summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAndrew Lenharth <andrewl@lenharth.org>2005-02-07 05:07:00 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-02-07 05:07:00 +0000
commita9e02156cea28e37919169d65bf9f9b126348d87 (patch)
treebe54b1025bb23541edb80e36d198b89ccb962002
parent0021f5586388daa93462dc021aadae366937982b (diff)
downloadbcm5719-llvm-a9e02156cea28e37919169d65bf9f9b126348d87.tar.gz
bcm5719-llvm-a9e02156cea28e37919169d65bf9f9b126348d87.zip
teach all loads and stores about the stack
llvm-svn: 20058
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelPattern.cpp42
1 files changed, 41 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
index ca68f60bbc8..2891e7bb1df 100644
--- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -125,7 +125,7 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG)
// assert(0 && "TODO");
MachineFunction &MF = DAG.getMachineFunction();
- MachineFrameInfo *MFI = MF.getFrameInfo();
+ MachineFrameInfo*MFI = MF.getFrameInfo();
GP = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
MachineBasicBlock& BB = MF.front();
@@ -442,6 +442,11 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -505,6 +510,11 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
BuildMI(BB, Alpha::LDS_SYM, 1, Tmp2).addConstantPoolIndex(CP->getIndex());
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp2);
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -636,6 +646,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -677,6 +692,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -719,6 +739,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 1, Result).addConstantPoolIndex(CP->getIndex());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -1247,6 +1272,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
AlphaLowering.restoreGP(BB);
BuildMI(BB, Alpha::LDQ_SYM, 1, Result).addConstantPoolIndex(CP->getIndex());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Alpha::LDQ, 2, Result).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -1374,6 +1404,11 @@ void ISel::Select(SDOperand N) {
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 3).addReg(Tmp1).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
@@ -1419,6 +1454,11 @@ void ISel::Select(SDOperand N) {
Opc = GetSymVersion(Opc);
BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(Address)->getGlobal());
}
+ else if(Address.getOpcode() == ISD::FrameIndex)
+ {
+ Tmp1 = cast<FrameIndexSDNode>(Address)->getIndex();
+ BuildMI(BB, Opc, 3).addReg(Tmp1).addFrameIndex(Tmp1).addReg(Alpha::F31);
+ }
else
{
long offset;
OpenPOWER on IntegriCloud