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authorCraig Topper <craig.topper@intel.com>2018-10-12 21:59:58 +0000
committerCraig Topper <craig.topper@intel.com>2018-10-12 21:59:58 +0000
commita8a44f1becf80e1bc40344c05149d2f94223b5dd (patch)
tree30b20ef30500ab6c5dd34d56b0018c9b2a14e11f
parent435e38a5df057385d2e2d6471c330af1bf43306b (diff)
downloadbcm5719-llvm-a8a44f1becf80e1bc40344c05149d2f94223b5dd.tar.gz
bcm5719-llvm-a8a44f1becf80e1bc40344c05149d2f94223b5dd.zip
[X86] Skip (v2i32/v4i16/v8i8 (bitcast (f64))) handling in ReplaceNodeResults if the dest type can be widened by generic legalization. NFCI
The algorithm we would do previously was identical to generic legalization. If we ever switch to legalizing integer vectors via widening we'll be able to kill off the code since it now only runs for promotion. llvm-svn: 344423
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp10
1 files changed, 2 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 97731dff9b2..220e2e2fdc0 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26297,7 +26297,8 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
}
if (SrcVT != MVT::f64 ||
- (DstVT != MVT::v2i32 && DstVT != MVT::v4i16 && DstVT != MVT::v8i8))
+ (DstVT != MVT::v2i32 && DstVT != MVT::v4i16 && DstVT != MVT::v8i8) ||
+ getTypeAction(*DAG.getContext(), DstVT) == TypeWidenVector)
return;
unsigned NumElts = DstVT.getVectorNumElements();
@@ -26307,13 +26308,6 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
MVT::v2f64, N->getOperand(0));
SDValue ToVecInt = DAG.getBitcast(WiderVT, Expanded);
- if (getTypeAction(*DAG.getContext(), DstVT) == TypeWidenVector) {
- // If we are legalizing vectors by widening, we already have the desired
- // legal vector type, just return it.
- Results.push_back(ToVecInt);
- return;
- }
-
SmallVector<SDValue, 8> Elts;
for (unsigned i = 0, e = NumElts; i != e; ++i)
Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SVT,
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