[llvm-mca] Use an ordered map to collect hardware statistics. NFC.

Histogram entries are now ordered by key.  This should improves their
readability when statistics are printed.

llvm-svn: 334961

10 files changed, 17 insertions, 14 deletions

diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s b/llvm/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
index 18929e8a663..4a51bcbb98e 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-2.s
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s
 
 imul   %rax, %rbx
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s
index 0db08eb3102..722d4763e06 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s
@@ -22,8 +22,8 @@ vmulps %xmm0, %xmm0, %xmm0
 # CHECK:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
 # CHECK-NEXT: [# dispatched], [# cycles]
 # CHECK-NEXT:  0,              20  (71.4%)
-# CHECK-NEXT:  2,              2  (7.1%)
 # CHECK-NEXT:  1,              6  (21.4%)
+# CHECK-NEXT:  2,              2  (7.1%)
 
 # CHECK:      Register File statistics:
 # CHECK-NEXT: Total number of mappings created:    10
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-stats-1.s b/llvm/test/tools/llvm-mca/X86/option-all-stats-1.s
index 31ae051727d..94afc066406 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-stats-1.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-stats-1.s
@@ -35,8 +35,8 @@ add %eax, %eax
 # FULLREPORT:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
 # FULLREPORT-NEXT: [# dispatched], [# cycles]
 # FULLREPORT-NEXT:  0,              22  (21.4%)
-# FULLREPORT-NEXT:  2,              19  (18.4%)
 # FULLREPORT-NEXT:  1,              62  (60.2%)
+# FULLREPORT-NEXT:  2,              19  (18.4%)
 
 # FULLREPORT:      Schedulers - number of cycles where we saw N instructions issued:
 # FULLREPORT-NEXT: [# issued], [# cycles]
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-stats-2.s b/llvm/test/tools/llvm-mca/X86/option-all-stats-2.s
index cefefbeaf7c..60a75501270 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-stats-2.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-stats-2.s
@@ -36,8 +36,8 @@ add %eax, %eax
 # FULL:      Dispatch Logic - number of cycles where we saw N instructions dispatched:
 # FULL-NEXT: [# dispatched], [# cycles]
 # FULL-NEXT:  0,              22  (21.4%)
-# FULL-NEXT:  2,              19  (18.4%)
 # FULL-NEXT:  1,              62  (60.2%)
+# FULL-NEXT:  2,              19  (18.4%)
 
 # FULL:      Schedulers - number of cycles where we saw N instructions issued:
 # FULL-NEXT: [# issued], [# cycles]
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-views-1.s b/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
index eff2e273e8e..430d3fa2147 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
@@ -37,8 +37,8 @@ add %eax, %eax
 # FULLREPORT:         Dispatch Logic - number of cycles where we saw N instructions dispatched:
 # FULLREPORT-NEXT:    [# dispatched], [# cycles]
 # FULLREPORT-NEXT:     0,              22  (21.4%)
-# FULLREPORT-NEXT:     2,              19  (18.4%)
 # FULLREPORT-NEXT:     1,              62  (60.2%)
+# FULLREPORT-NEXT:     2,              19  (18.4%)
 
 # FULLREPORT:         Schedulers - number of cycles where we saw N instructions issued:
 # FULLREPORT-NEXT:    [# issued], [# cycles]
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-views-2.s b/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
index 2b59cd3aba4..bf25e475b30 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
@@ -36,8 +36,8 @@ add %eax, %eax
 # ALL:             Dispatch Logic - number of cycles where we saw N instructions dispatched:
 # ALL-NEXT:        [# dispatched], [# cycles]
 # ALL-NEXT:         0,              22  (21.4%)
-# ALL-NEXT:         2,              19  (18.4%)
 # ALL-NEXT:         1,              62  (60.2%)
+# ALL-NEXT:         2,              19  (18.4%)
 
 # ALL:             Schedulers - number of cycles where we saw N instructions issued:
 # ALL-NEXT:        [# issued], [# cycles]
diff --git a/llvm/tools/llvm-mca/DispatchStatistics.h b/llvm/tools/llvm-mca/DispatchStatistics.h
index 3b735a16266..7b98a848df6 100644
--- a/llvm/tools/llvm-mca/DispatchStatistics.h
+++ b/llvm/tools/llvm-mca/DispatchStatistics.h
@@ -35,9 +35,9 @@
 #define LLVM_TOOLS_LLVM_MCA_DISPATCHVIEW_H
 
 #include "View.h"
-#include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MC/MCSubtargetInfo.h"
+#include <map>
 
 namespace mca {
 
@@ -49,7 +49,7 @@ class DispatchStatistics : public View {
   // is one counter for every generic stall kind (see class HWStallEvent).
   llvm::SmallVector<unsigned, 8> HWStalls;
 
-  using Histogram = llvm::DenseMap<unsigned, unsigned>;
+  using Histogram = std::map<unsigned, unsigned>;
   Histogram DispatchGroupSizePerCycle;
 
   void updateHistograms() {
diff --git a/llvm/tools/llvm-mca/RetireControlUnitStatistics.h b/llvm/tools/llvm-mca/RetireControlUnitStatistics.h
index e10c6626ee9..5c91af532ec 100644
--- a/llvm/tools/llvm-mca/RetireControlUnitStatistics.h
+++ b/llvm/tools/llvm-mca/RetireControlUnitStatistics.h
@@ -27,13 +27,13 @@
 #define LLVM_TOOLS_LLVM_MCA_RETIRECONTROLUNITSTATISTICS_H
 
 #include "View.h"
-#include "llvm/ADT/DenseMap.h"
 #include "llvm/MC/MCSubtargetInfo.h"
+#include <map>
 
 namespace mca {
 
 class RetireControlUnitStatistics : public View {
-  using Histogram = llvm::DenseMap<unsigned, unsigned>;
+  using Histogram = std::map<unsigned, unsigned>;
   Histogram RetiredPerCycle;
 
   unsigned NumRetired;
diff --git a/llvm/tools/llvm-mca/SchedulerStatistics.cpp b/llvm/tools/llvm-mca/SchedulerStatistics.cpp
index 128bb8f4466..dc38f6889c9 100644
--- a/llvm/tools/llvm-mca/SchedulerStatistics.cpp
+++ b/llvm/tools/llvm-mca/SchedulerStatistics.cpp
@@ -81,8 +81,10 @@ void SchedulerStatistics::printSchedulerUsage(raw_ostream &OS) const {
     if (ProcResource.BufferSize <= 0)
       continue;
 
-    const BufferUsage &BU = BufferedResources.lookup(I);
-    TempStream << ProcResource.Name << ",  " << BU.MaxUsedSlots << '/'
+    const auto It = BufferedResources.find(I);
+    unsigned MaxUsedSlots =
+        It == BufferedResources.end() ? 0 : It->second.MaxUsedSlots;
+    TempStream << ProcResource.Name << ",  " << MaxUsedSlots << '/'
                << ProcResource.BufferSize << '\n';
   }
 
diff --git a/llvm/tools/llvm-mca/SchedulerStatistics.h b/llvm/tools/llvm-mca/SchedulerStatistics.h
index bbb7535bdaf..08d8a349437 100644
--- a/llvm/tools/llvm-mca/SchedulerStatistics.h
+++ b/llvm/tools/llvm-mca/SchedulerStatistics.h
@@ -33,15 +33,15 @@
 
 #include "View.h"
 #include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/DenseMap.h"
 #include "llvm/MC/MCSubtargetInfo.h"
+#include <map>
 
 namespace mca {
 
 class SchedulerStatistics : public View {
   const llvm::MCSchedModel &SM;
 
-  using Histogram = llvm::DenseMap<unsigned, unsigned>;
+  using Histogram = std::map<unsigned, unsigned>;
   Histogram IssuedPerCycle;
 
   unsigned NumIssued;
@@ -53,7 +53,7 @@ class SchedulerStatistics : public View {
     unsigned MaxUsedSlots;
   };
 
-  llvm::DenseMap<unsigned, BufferUsage> BufferedResources;
+  std::map<unsigned, BufferUsage> BufferedResources;
 
   void updateHistograms() {
     IssuedPerCycle[NumIssued]++;