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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-07-20 15:51:01 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-07-20 15:51:01 +0000 |
| commit | a85b86a9828c105f834dd3c14aa3f338ea7fd8c1 (patch) | |
| tree | 6e35b5dc6aa90361cfcecfa87685494514a52c2a | |
| parent | a2bc2d488c368d74118487159128638b307a9c61 (diff) | |
| download | bcm5719-llvm-a85b86a9828c105f834dd3c14aa3f338ea7fd8c1.tar.gz bcm5719-llvm-a85b86a9828c105f834dd3c14aa3f338ea7fd8c1.zip | |
[X86][AVX] Add support for i16 256-bit vector horizontal op redundant shuffle removal
llvm-svn: 337566
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/haddsub-shuf.ll | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e1b7adfaf50..3e57c3ca2d4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -31164,7 +31164,9 @@ static SDValue foldShuffleOfHorizOp(SDNode *N) { if (HOp.getValueSizeInBits() == 256 && (isTargetShuffleEquivalent(Mask, {0, 0, 2, 2}) || - isTargetShuffleEquivalent(Mask, {0, 1, 0, 1, 4, 5, 4, 5}))) + isTargetShuffleEquivalent(Mask, {0, 1, 0, 1, 4, 5, 4, 5}) || + isTargetShuffleEquivalent( + Mask, {0, 1, 2, 3, 0, 1, 2, 3, 8, 9, 10, 11, 8, 9, 10, 11}))) return HOp; return SDValue(); diff --git a/llvm/test/CodeGen/X86/haddsub-shuf.ll b/llvm/test/CodeGen/X86/haddsub-shuf.ll index 935d3254d5c..1a602d1664b 100644 --- a/llvm/test/CodeGen/X86/haddsub-shuf.ll +++ b/llvm/test/CodeGen/X86/haddsub-shuf.ll @@ -432,7 +432,6 @@ define <16 x i16> @hadd_v16i16b(<16 x i16> %a) { ; AVX2-LABEL: hadd_v16i16b: ; AVX2: # %bb.0: ; AVX2-NEXT: vphaddw %ymm0, %ymm0, %ymm0 -; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2-NEXT: retq %a0 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 10, i32 12, i32 14, i32 undef, i32 undef, i32 undef, i32 undef> %a1 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 9, i32 11, i32 13, i32 15, i32 undef, i32 undef, i32 undef, i32 undef> @@ -513,7 +512,6 @@ define <16 x i16> @hsub_v16i16b(<16 x i16> %a) { ; AVX2-LABEL: hsub_v16i16b: ; AVX2: # %bb.0: ; AVX2-NEXT: vphsubw %ymm0, %ymm0, %ymm0 -; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5] ; AVX2-NEXT: retq %a0 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 10, i32 12, i32 14, i32 undef, i32 undef, i32 undef, i32 undef> %a1 = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 9, i32 11, i32 13, i32 15, i32 undef, i32 undef, i32 undef, i32 undef> |
