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| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:55:17 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:55:17 +0000 |
| commit | a6a9c20c23a8a1f2a856da0af667fb9fb457b0be (patch) | |
| tree | e1ad488e07bc0f1a76c89b45fdc846915a861808 | |
| parent | 7b502920eff49c3530f0211523c5296bd467435a (diff) | |
| download | bcm5719-llvm-a6a9c20c23a8a1f2a856da0af667fb9fb457b0be.tar.gz bcm5719-llvm-a6a9c20c23a8a1f2a856da0af667fb9fb457b0be.zip | |
Set register class of a register according to value of HasMips64.
llvm-svn: 140570
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 6ad77242402..4578d224b67 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2268,7 +2268,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, else if (RegVT == MVT::f32) RC = Mips::FGR32RegisterClass; else if (RegVT == MVT::f64) - RC = Mips::AFGR64RegisterClass; + RC = HasMips64 ? Mips::FGR64RegisterClass : Mips::AFGR64RegisterClass; else llvm_unreachable("RegVT not supported by FormalArguments Lowering"); |
