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| author | Guozhi Wei <carrot@google.com> | 2017-01-20 23:35:27 +0000 |
|---|---|---|
| committer | Guozhi Wei <carrot@google.com> | 2017-01-20 23:35:27 +0000 |
| commit | a5c6ed5a5ce7d0fa2c1921f79c2080c5051075a8 (patch) | |
| tree | 7d340b9a9dab3b714994709ea007059e39aa997c | |
| parent | f39ce9947434535529971e35c711e45c6c2fafec (diff) | |
| download | bcm5719-llvm-a5c6ed5a5ce7d0fa2c1921f79c2080c5051075a8.tar.gz bcm5719-llvm-a5c6ed5a5ce7d0fa2c1921f79c2080c5051075a8.zip | |
[PPC] Give unaligned memory access lower cost on processor that supports it
Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost.
This patch fixes pr31492.
Differential Revision: https://reviews.llvm.org/D28630
llvm-svn: 292680
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/Analysis/CostModel/PowerPC/load_store.ll | 2 | ||||
| -rw-r--r-- | llvm/test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll | 26 |
3 files changed, 31 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp index f94d1eab097..2f1bceaa481 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -401,6 +401,10 @@ int PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, if (IsVSXType || (ST->hasVSX() && IsAltivecType)) return Cost; + // Newer PPC supports unaligned memory access. + if (TLI->allowsMisalignedMemoryAccesses(LT.second, 0)) + return Cost; + // PPC in general does not support unaligned loads and stores. They'll need // to be decomposed based on the alignment factor. diff --git a/llvm/test/Analysis/CostModel/PowerPC/load_store.ll b/llvm/test/Analysis/CostModel/PowerPC/load_store.ll index d48be5b5f62..b77dd444774 100644 --- a/llvm/test/Analysis/CostModel/PowerPC/load_store.ll +++ b/llvm/test/Analysis/CostModel/PowerPC/load_store.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s +; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 -disable-ppc-unaligned | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll b/llvm/test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll new file mode 100644 index 00000000000..6addf25949e --- /dev/null +++ b/llvm/test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=+vsx | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i32 @test(i32 %arg) { + + ; CHECK: cost of 1 {{.*}} load + load i8, i8* undef, align 1 + ; CHECK: cost of 1 {{.*}} load + load i16, i16* undef, align 1 + ; CHECK: cost of 1 {{.*}} load + load i32, i32* undef, align 1 + ; CHECK: cost of 1 {{.*}} load + load i64, i64* undef, align 1 + + ; CHECK: cost of 1 {{.*}} store + store i8 undef, i8* undef, align 1 + ; CHECK: cost of 1 {{.*}} store + store i16 undef, i16* undef, align 1 + ; CHECK: cost of 1 {{.*}} store + store i32 undef, i32* undef, align 1 + ; CHECK: cost of 1 {{.*}} store + store i64 undef, i64* undef, align 1 + + ret i32 undef +} |
