[X86] Add _mm_bslli_si128 and _mm_bsrli_si128 as aliases of _mm_slli_si128 and _mm_srli_si128. This matches Intel documentation and gcc.

llvm-svn: 229066

2 files changed, 30 insertions, 0 deletions

diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h
index 4ad3a776633..c764d68a185 100644
--- a/clang/lib/Headers/emmintrin.h
+++ b/clang/lib/Headers/emmintrin.h
@@ -845,6 +845,9 @@ _mm_xor_si128(__m128i __a, __m128i __b)
                                    ((imm)&0xF0) ? 0 : 30 - ((imm)&0xF), \
                                    ((imm)&0xF0) ? 0 : 31 - ((imm)&0xF)); })
 
+#define _mm_bslli_si128(a, imm) \
+  _mm_slli_si128((a), (imm))
+
 static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
 _mm_slli_epi16(__m128i __a, int __count)
 {
@@ -925,6 +928,9 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
                                    ((imm)&0xF0) ? 16 : ((imm)&0xF) + 14, \
                                    ((imm)&0xF0) ? 16 : ((imm)&0xF) + 15); })
 
+#define _mm_bsrli_si128(a, imm) \
+  _mm_srli_si128((a), (imm))
+
 static __inline__ __m128i __attribute__((__always_inline__, __nodebug__))
 _mm_srli_epi16(__m128i __a, int __count)
 {
diff --git a/clang/test/CodeGen/sse-builtins.c b/clang/test/CodeGen/sse-builtins.c
index 34c2de7d331..5dcb228db2d 100644
--- a/clang/test/CodeGen/sse-builtins.c
+++ b/clang/test/CodeGen/sse-builtins.c
@@ -543,3 +543,27 @@ __m128d test_mm_cmpnge_pd(__m128d __a, __m128d __b) {
   // CHECK: @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 6)
   return _mm_cmpnge_pd(__a, __b);
 }
+
+__m128 test_mm_slli_si128(__m128 a) {
+  // CHECK-LABEL: @test_mm_slli_si128
+  // CHECK: shufflevector <16 x i8> <{{.*}}, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> {{.*}}, <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26>
+  return _mm_slli_si128(a, 5);
+}
+
+__m128 test_mm_bslli_si128(__m128 a) {
+  // CHECK-LABEL: @test_mm_bslli_si128
+  // CHECK: shufflevector <16 x i8> <{{.*}}, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> {{.*}}, <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26>
+  return _mm_bslli_si128(a, 5);
+}
+
+__m128 test_mm_srli_si128(__m128 a) {
+  // CHECK-LABEL: @test_mm_srli_si128
+  // CHECK: shufflevector <16 x i8> {{.*}}, <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, {{.*}}>, <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>
+  return _mm_srli_si128(a, 5);
+}
+
+__m128 test_mm_bsrli_si128(__m128 a) {
+  // CHECK-LABEL: @test_mm_bsrli_si128
+  // CHECK: shufflevector <16 x i8> {{.*}}, <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, {{.*}}>, <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20>
+  return _mm_bsrli_si128(a, 5);
+}