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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-05 20:04:12 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-05 20:04:12 +0000 |
| commit | a3d0c5adafdeccc5f024ff5033ce732e747b52ef (patch) | |
| tree | f5e97314e5201aa4c63c16e7edd58a74c161138d | |
| parent | 97bc08ae02bf4b490abbe27ecb0ee6250892e1e2 (diff) | |
| download | bcm5719-llvm-a3d0c5adafdeccc5f024ff5033ce732e747b52ef.tar.gz bcm5719-llvm-a3d0c5adafdeccc5f024ff5033ce732e747b52ef.zip | |
GlobalISel: Verify G_GEP
llvm-svn: 353209
| -rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 16 | ||||
| -rw-r--r-- | llvm/test/Verifier/test_g_gep.mir | 32 |
2 files changed, 48 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 6778dce3972..45fe64e45ba 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1100,6 +1100,22 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) { break; } + case TargetOpcode::G_GEP: { + LLT DstTy = MRI->getType(MI->getOperand(0).getReg()); + LLT PtrTy = MRI->getType(MI->getOperand(1).getReg()); + LLT OffsetTy = MRI->getType(MI->getOperand(2).getReg()); + if (!DstTy.isValid() || !PtrTy.isValid() || !OffsetTy.isValid()) + break; + + if (!PtrTy.getScalarType().isPointer()) + report("gep first operand must be a pointer", MI); + + if (OffsetTy.getScalarType().isPointer()) + report("gep offset operand must not be a pointer", MI); + + // TODO: Is the offset allowed to be a scalar with a vector? + break; + } case TargetOpcode::G_SEXT: case TargetOpcode::G_ZEXT: case TargetOpcode::G_ANYEXT: diff --git a/llvm/test/Verifier/test_g_gep.mir b/llvm/test/Verifier/test_g_gep.mir new file mode 100644 index 00000000000..5e34625d1e7 --- /dev/null +++ b/llvm/test/Verifier/test_g_gep.mir @@ -0,0 +1,32 @@ +#RUN: not llc -o - -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# REQUIRES: global-isel, aarch64-registered-target + +--- +name: test_gep +legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +liveins: +body: | + bb.0: + + %0:_(p0) = G_IMPLICIT_DEF + %1:_(s64) = G_IMPLICIT_DEF + + ; CHECK: Bad machine code: Type mismatch in generic instruction + %2:_(s64) = G_GEP %0, %1 + + ; CHECK: Bad machine code: Type mismatch in generic instruction + %3:_(p0) = G_GEP %1, %1 + + ; CHECK: Bad machine code: gep offset operand must not be a pointer + %4:_(p0) = G_GEP %0, %0 + + ; CHECK: Bad machine code: Type mismatch in generic instruction + %5:_(p1) = G_GEP %0, %1 + + ; CHECK: Bad machine code: gep first operand must be a pointer + %6:_(s64) = G_GEP %1, %1 + +... |
