Thumb assembly parsing and encoding for LDRB.

llvm-svn: 138059

3 files changed, 38 insertions, 0 deletions

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 0c7e349698b..35a745aa78a 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -179,11 +179,13 @@ def t_addrmode_is2 : Operand<i32>,
 
 // t_addrmode_is1 := reg + imm5
 //
+def t_addrmode_is1_asm_operand : AsmOperandClass { let Name = "MemThumbRIs1"; }
 def t_addrmode_is1 : Operand<i32>,
                      ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S1", []> {
   let EncoderMethod = "getAddrModeISOpValue";
   let DecoderMethod = "DecodeThumbAddrModeIS";
   let PrintMethod = "printThumbAddrModeImm5S1Operand";
+  let ParserMatchClass = t_addrmode_is1_asm_operand;
   let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
 }
 
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index b6fce294f2a..d04b9b73cc4 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -628,6 +628,15 @@ public:
     int64_t Val = Mem.OffsetImm->getValue();
     return Val >= 0 && Val <= 124 && (Val % 4) == 0;
   }
+  bool isMemThumbRIs1() const {
+    if (Kind != Memory || Mem.OffsetRegNum != 0 ||
+        !isARMLowRegister(Mem.BaseRegNum))
+      return false;
+    // Immediate offset in range [0, 31].
+    if (!Mem.OffsetImm) return true;
+    int64_t Val = Mem.OffsetImm->getValue();
+    return Val >= 0 && Val <= 31;
+  }
   bool isMemThumbSPI() const {
     if (Kind != Memory || Mem.OffsetRegNum != 0 || Mem.BaseRegNum != ARM::SP)
       return false;
@@ -1000,6 +1009,13 @@ public:
     Inst.addOperand(MCOperand::CreateImm(Val));
   }
 
+  void addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const {
+    assert(N == 2 && "Invalid number of operands!");
+    int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue()) : 0;
+    Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
+    Inst.addOperand(MCOperand::CreateImm(Val));
+  }
+
   void addMemThumbSPIOperands(MCInst &Inst, unsigned N) const {
     assert(N == 2 && "Invalid number of operands!");
     int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue() / 4) : 0;
diff --git a/llvm/test/MC/ARM/basic-thumb-instructions.s b/llvm/test/MC/ARM/basic-thumb-instructions.s
index deedd3be00d..4a45820b88a 100644
--- a/llvm/test/MC/ARM/basic-thumb-instructions.s
+++ b/llvm/test/MC/ARM/basic-thumb-instructions.s
@@ -210,3 +210,23 @@ _func:
         ldr r1, [r2, r3]
 
 @ CHECK: ldr	r1, [r2, r3]            @ encoding: [0xd1,0x58]
+
+
+@------------------------------------------------------------------------------
+@ LDRB (immediate)
+@------------------------------------------------------------------------------
+        ldrb r4, [r3]
+        ldrb r5, [r6, #0]
+        ldrb r6, [r7, #31]
+
+@ CHECK: ldrb	r4, [r3]                @ encoding: [0x1c,0x78]
+@ CHECK: ldrb	r5, [r6]                @ encoding: [0x35,0x78]
+@ CHECK: ldrb	r6, [r7, #31]           @ encoding: [0xfe,0x7f]
+
+
+@------------------------------------------------------------------------------
+@ LDRB (register)
+@------------------------------------------------------------------------------
+        ldrb r6, [r4, r5]
+
+@ CHECK: ldrb	r6, [r4, r5]            @ encoding: [0x66,0x5d]