diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-02 04:05:14 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-02 04:05:14 +0000 |
| commit | a266bd8760c7029da87aec78cbc13f6354d2d9af (patch) | |
| tree | d9c52173bc2649632b93eea502a69ab5fe68ece5 | |
| parent | 5de68cbc4c2ebddac590c33ad3b4dab7498b121d (diff) | |
| download | bcm5719-llvm-a266bd8760c7029da87aec78cbc13f6354d2d9af.tar.gz bcm5719-llvm-a266bd8760c7029da87aec78cbc13f6354d2d9af.zip | |
AMDGPU: Cleanup suggested in bug 23960
llvm-svn: 262456
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index f1aa4ccfcdc..634b65d7e6a 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -1051,12 +1051,10 @@ bool SIInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, // Multiplied part is the constant: Use v_madmk_f32 // We should only expect these to be on src0 due to canonicalizations. if (Src0->isReg() && Src0->getReg() == Reg) { - if (!Src1->isReg() || - (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))) + if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))) return false; - if (!Src2->isReg() || - (Src2->isReg() && RI.isSGPRClass(MRI->getRegClass(Src2->getReg())))) + if (!Src2->isReg() || RI.isSGPRClass(MRI->getRegClass(Src2->getReg()))) return false; // We need to do some weird looking operand shuffling since the madmk @@ -1116,8 +1114,7 @@ bool SIInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, (Src0->isReg() && RI.isSGPRClass(MRI->getRegClass(Src0->getReg())))) return false; - if (!Src1->isReg() || - (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))) + if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))) return false; const int64_t Imm = DefMI->getOperand(1).getImm(); |
