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authorDaniel Dunbar <daniel@zuster.org>2010-05-26 17:45:29 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-05-26 17:45:29 +0000
commita19838e1076f361c3fde481c515f60a13a64b19f (patch)
treed6574906422e3f2d5f2faa23b5beecd7dfac754e
parent95fcc9675298aaca92d9f9a8da7b394f719065b2 (diff)
downloadbcm5719-llvm-a19838e1076f361c3fde481c515f60a13a64b19f.tar.gz
bcm5719-llvm-a19838e1076f361c3fde481c515f60a13a64b19f.zip
MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it
before encoding. llvm-svn: 104707
-rw-r--r--llvm/include/llvm/Target/TargetAsmBackend.h5
-rw-r--r--llvm/lib/MC/MCAssembler.cpp2
-rw-r--r--llvm/lib/MC/MCMachOStreamer.cpp2
-rw-r--r--llvm/lib/Target/X86/X86AsmBackend.cpp36
4 files changed, 13 insertions, 32 deletions
diff --git a/llvm/include/llvm/Target/TargetAsmBackend.h b/llvm/include/llvm/Target/TargetAsmBackend.h
index 527c9e1ea1d..7a1689d0873 100644
--- a/llvm/include/llvm/Target/TargetAsmBackend.h
+++ b/llvm/include/llvm/Target/TargetAsmBackend.h
@@ -112,10 +112,7 @@ public:
/// relaxation.
///
/// \arg Inst - The instruction to test.
- /// \arg Fixups - The actual fixups this instruction encoded to, for potential
- /// use by the target backend.
- virtual bool MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const = 0;
+ virtual bool MayNeedRelaxation(const MCInst &Inst) const = 0;
/// RelaxInstruction - Relax the instruction in the given fragment to the next
/// wider instruction.
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index 705521d9d7a..703f727d9d7 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -787,7 +787,7 @@ bool MCAssembler::FragmentNeedsRelaxation(const MCInstFragment *IF,
// If this inst doesn't ever need relaxation, ignore it. This occurs when we
// are intentionally pushing out inst fragments, or because we relaxed a
// previous instruction to one that doesn't need relaxation.
- if (!getBackend().MayNeedRelaxation(IF->getInst(), IF->getFixups()))
+ if (!getBackend().MayNeedRelaxation(IF->getInst()))
return false;
for (MCInstFragment::const_fixup_iterator it = IF->fixup_begin(),
diff --git a/llvm/lib/MC/MCMachOStreamer.cpp b/llvm/lib/MC/MCMachOStreamer.cpp
index f49acf28b97..50348e4ea3e 100644
--- a/llvm/lib/MC/MCMachOStreamer.cpp
+++ b/llvm/lib/MC/MCMachOStreamer.cpp
@@ -452,7 +452,7 @@ void MCMachOStreamer::EmitInstruction(const MCInst &Inst) {
// total knowledge about undefined symbols at that point). Even now, though,
// we can do a decent job, especially on Darwin where scattering means that we
// are going to often know that we can never fully resolve a fixup.
- if (Assembler.getBackend().MayNeedRelaxation(Inst, AsmFixups)) {
+ if (Assembler.getBackend().MayNeedRelaxation(Inst)) {
MCInstFragment *IF = new MCInstFragment(Inst, CurSectionData);
IF->setAtom(CurrentAtomMap.lookup(CurSectionData));
diff --git a/llvm/lib/Target/X86/X86AsmBackend.cpp b/llvm/lib/Target/X86/X86AsmBackend.cpp
index aaa5845d66e..c647713428a 100644
--- a/llvm/lib/Target/X86/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/X86AsmBackend.cpp
@@ -54,8 +54,7 @@ public:
DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
}
- bool MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const;
+ bool MayNeedRelaxation(const MCInst &Inst) const;
void RelaxInstruction(const MCInstFragment *IF, MCInst &Res) const;
@@ -88,31 +87,16 @@ static unsigned getRelaxedOpcode(unsigned Op) {
}
}
-bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const {
- for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
- const MCFixup &F = Fixups[i];
+bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
+ // Check if this instruction is ever relaxable.
+ if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
+ return false;
- // We don't support relaxing anything else currently. Make sure we error out
- // if we see a non-constant 1 or 2 byte fixup.
- //
- // FIXME: We should need to check this here, this is better checked in the
- // object writer which should be verifying that any final relocations match
- // the expected fixup. However, that code is more complicated and hasn't
- // been written yet. See the FIXMEs in MachObjectWriter.cpp.
- if ((F.getKind() == FK_Data_1 || F.getKind() == FK_Data_2) &&
- !isa<MCConstantExpr>(F.getValue()))
- report_fatal_error("unexpected small fixup with a non-constant operand!");
-
- // Check for a 1byte pcrel fixup, and enforce that we would know how to
- // relax this instruction.
- if (unsigned(F.getKind()) == X86::reloc_pcrel_1byte) {
- assert(getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode());
- return true;
- }
- }
-
- return false;
+ // If so, just assume it can be relaxed. Once we support relaxing more complex
+ // instructions we should check that the instruction actually has symbolic
+ // operands before doing this, but we need to be careful about things like
+ // PCrel.
+ return true;
}
// FIXME: Can tblgen help at all here to verify there aren't other instructions
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