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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-12 19:56:43 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-12 19:56:43 +0000 |
| commit | a1978aaefd3adc7675e1efbff9f907cd4318e624 (patch) | |
| tree | b727e59ef7c57864b8804c94fd899177a381355a | |
| parent | e94124804efdd851b876c33e961257484b81dc44 (diff) | |
| download | bcm5719-llvm-a1978aaefd3adc7675e1efbff9f907cd4318e624.tar.gz bcm5719-llvm-a1978aaefd3adc7675e1efbff9f907cd4318e624.zip | |
[NVPTX] Don't flag StoreRetVal memory chain operands as ReadMem (PR32146)
This fixes 47 of the 75 NVPTX '-verify-machineinstrs with EXPENSIVE_CHECKS' errors in PR32146.
Differential Revision: https://reviews.llvm.org/D33147
llvm-svn: 302942
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/ctlz.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/ctpop.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/cttz.ll | 3 |
4 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp index 2687c155d75..cca45b1efff 100644 --- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -2578,7 +2578,9 @@ NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, EVT TheStoreType = ExtendIntegerRetVal ? MVT::i32 : VTs[i];
Chain = DAG.getMemIntrinsicNode(Op, dl, DAG.getVTList(MVT::Other),
StoreOperands, TheStoreType,
- MachinePointerInfo(), 1);
+ MachinePointerInfo(), /* Align */ 1,
+ /* Volatile */ false, /* ReadMem */ false,
+ /* WriteMem */ true, /* Size */ 0);
// Cleanup vector state.
StoreOperands.clear();
}
diff --git a/llvm/test/CodeGen/NVPTX/ctlz.ll b/llvm/test/CodeGen/NVPTX/ctlz.ll index 005958bd938..7aa29fe811d 100644 --- a/llvm/test/CodeGen/NVPTX/ctlz.ll +++ b/llvm/test/CodeGen/NVPTX/ctlz.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" diff --git a/llvm/test/CodeGen/NVPTX/ctpop.ll b/llvm/test/CodeGen/NVPTX/ctpop.ll index b961d4d27bd..69a4f879a8d 100644 --- a/llvm/test/CodeGen/NVPTX/ctpop.ll +++ b/llvm/test/CodeGen/NVPTX/ctpop.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" diff --git a/llvm/test/CodeGen/NVPTX/cttz.ll b/llvm/test/CodeGen/NVPTX/cttz.ll index 124ba9d1e9a..0bfe0139bcd 100644 --- a/llvm/test/CodeGen/NVPTX/cttz.ll +++ b/llvm/test/CodeGen/NVPTX/cttz.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s - +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" |
