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authorDuncan P. N. Exon Smith <dexonsmith@apple.com>2014-07-30 17:11:27 +0000
committerDuncan P. N. Exon Smith <dexonsmith@apple.com>2014-07-30 17:11:27 +0000
commita12e023c8af35d5f9029d7484e180521e50f4a1f (patch)
tree325be91ee51f08c29663d6af50b6efc1d3f6ac68
parente8387a5d2b7aab37f144e1e3c382349602a6276d (diff)
downloadbcm5719-llvm-a12e023c8af35d5f9029d7484e180521e50f4a1f.tar.gz
bcm5719-llvm-a12e023c8af35d5f9029d7484e180521e50f4a1f.zip
Rename llvm-uselistorder => verify-uselistorder
llvm-svn: 214318
-rw-r--r--llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll2
-rw-r--r--llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll2
-rw-r--r--llvm/test/Bitcode/aggregateInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll2
-rw-r--r--llvm/test/Bitcode/atomic.ll2
-rw-r--r--llvm/test/Bitcode/attributes-3.3.ll2
-rw-r--r--llvm/test/Bitcode/attributes.ll2
-rw-r--r--llvm/test/Bitcode/binaryFloatInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/binaryIntInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/bitwiseInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/calling-conventions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/case-ranges-3.3.ll2
-rw-r--r--llvm/test/Bitcode/cmpxchg-upgrade.ll2
-rw-r--r--llvm/test/Bitcode/conversionInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/drop-debug-info.ll2
-rw-r--r--llvm/test/Bitcode/extractelement.ll2
-rw-r--r--llvm/test/Bitcode/flags.ll2
-rw-r--r--llvm/test/Bitcode/function-encoding-rel-operands.ll2
-rw-r--r--llvm/test/Bitcode/global-variables.3.2.ll2
-rw-r--r--llvm/test/Bitcode/inalloca.ll2
-rw-r--r--llvm/test/Bitcode/linkage-types-3.2.ll2
-rw-r--r--llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll2
-rw-r--r--llvm/test/Bitcode/memInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/metadata.ll2
-rw-r--r--llvm/test/Bitcode/old-aliases.ll2
-rw-r--r--llvm/test/Bitcode/ptest-new.ll2
-rw-r--r--llvm/test/Bitcode/ptest-old.ll2
-rw-r--r--llvm/test/Bitcode/select.ll2
-rw-r--r--llvm/test/Bitcode/shuffle.ll2
-rw-r--r--llvm/test/Bitcode/tailcall.ll2
-rw-r--r--llvm/test/Bitcode/terminatorInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/upgrade-global-ctors.ll2
-rw-r--r--llvm/test/Bitcode/upgrade-loop-metadata.ll2
-rw-r--r--llvm/test/Bitcode/upgrade-tbaa.ll2
-rw-r--r--llvm/test/Bitcode/use-list-order.ll2
-rw-r--r--llvm/test/Bitcode/vectorInstructions.3.2.ll2
-rw-r--r--llvm/test/Bitcode/visibility-styles.3.2.ll2
-rw-r--r--llvm/test/Bitcode/weak-cmpxchg-upgrade.ll2
-rw-r--r--llvm/test/CMakeLists.txt2
-rw-r--r--llvm/test/lit.cfg2
-rw-r--r--llvm/tools/CMakeLists.txt2
-rw-r--r--llvm/tools/LLVMBuild.txt2
-rw-r--r--llvm/tools/Makefile2
-rw-r--r--llvm/tools/verify-uselistorder/CMakeLists.txt (renamed from llvm/tools/llvm-uselistorder/CMakeLists.txt)4
-rw-r--r--llvm/tools/verify-uselistorder/LLVMBuild.txt (renamed from llvm/tools/llvm-uselistorder/LLVMBuild.txt)4
-rw-r--r--llvm/tools/verify-uselistorder/Makefile (renamed from llvm/tools/llvm-uselistorder/Makefile)4
-rw-r--r--llvm/tools/verify-uselistorder/verify-uselistorder.cpp (renamed from llvm/tools/llvm-uselistorder/llvm-uselistorder.cpp)2
47 files changed, 50 insertions, 50 deletions
diff --git a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
index e1e2d7dc544..461a92a84a1 100644
--- a/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
+++ b/llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
@@ -1,7 +1,7 @@
; This test ensures that we get a bitcast constant expression in and out,
; not a sitofp constant expression.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: bitcast (
@G = external global i32
diff --git a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
index a321ce21311..16f7e9ab9ae 100644
--- a/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
+++ b/llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR4373
@foo = weak global { i32 } zeroinitializer
diff --git a/llvm/test/Bitcode/aggregateInstructions.3.2.ll b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
index 4d35be08bd1..2853823f1c9 100644
--- a/llvm/test/Bitcode/aggregateInstructions.3.2.ll
+++ b/llvm/test/Bitcode/aggregateInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands
diff --git a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index fba518fe7f7..c1eba948b6b 100644
--- a/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Tests vclz and vcnt
define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
diff --git a/llvm/test/Bitcode/atomic.ll b/llvm/test/Bitcode/atomic.ll
index 448219a59cb..bccb868653c 100644
--- a/llvm/test/Bitcode/atomic.ll
+++ b/llvm/test/Bitcode/atomic.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
diff --git a/llvm/test/Bitcode/attributes-3.3.ll b/llvm/test/Bitcode/attributes-3.3.ll
index 7b44938a3e8..359d7ce3875 100644
--- a/llvm/test/Bitcode/attributes-3.3.ll
+++ b/llvm/test/Bitcode/attributes-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
; The test checks that LLVM does not silently misread attributes of
diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll
index 0fe66f5ad82..8286e396adf 100644
--- a/llvm/test/Bitcode/attributes.ll
+++ b/llvm/test/Bitcode/attributes.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR12696
define void @f1(i8 zeroext)
diff --git a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
index a0010e03834..4df57109435 100644
--- a/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary float instructions from
diff --git a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
index bcf3d5882e0..4559b4f4526 100644
--- a/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
+++ b/llvm/test/Bitcode/binaryIntInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary integer instructions from
diff --git a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
index 780f0447a52..f6d46577d97 100644
--- a/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
+++ b/llvm/test/Bitcode/bitwiseInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread bitwise instructions from
diff --git a/llvm/test/Bitcode/calling-conventions.3.2.ll b/llvm/test/Bitcode/calling-conventions.3.2.ll
index 6a497dc8d5a..e1f16349499 100644
--- a/llvm/test/Bitcode/calling-conventions.3.2.ll
+++ b/llvm/test/Bitcode/calling-conventions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread calling conventions of
diff --git a/llvm/test/Bitcode/case-ranges-3.3.ll b/llvm/test/Bitcode/case-ranges-3.3.ll
index 1198f2bb2cb..eaab6ec5823 100644
--- a/llvm/test/Bitcode/case-ranges-3.3.ll
+++ b/llvm/test/Bitcode/case-ranges-3.3.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
; release of LLVM. This tests that the bitcode for switches from that release
diff --git a/llvm/test/Bitcode/cmpxchg-upgrade.ll b/llvm/test/Bitcode/cmpxchg-upgrade.ll
index 94f0eef455e..2a69ec5db5b 100644
--- a/llvm/test/Bitcode/cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.
diff --git a/llvm/test/Bitcode/conversionInstructions.3.2.ll b/llvm/test/Bitcode/conversionInstructions.3.2.ll
index 9f8204821d4..550d44349e7 100644
--- a/llvm/test/Bitcode/conversionInstructions.3.2.ll
+++ b/llvm/test/Bitcode/conversionInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread conversion instructions from
diff --git a/llvm/test/Bitcode/drop-debug-info.ll b/llvm/test/Bitcode/drop-debug-info.ll
index b3073e0d6c8..ee860115a83 100644
--- a/llvm/test/Bitcode/drop-debug-info.ll
+++ b/llvm/test/Bitcode/drop-debug-info.ll
@@ -1,6 +1,6 @@
; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
; RUN: llvm-dis < %t.bc | FileCheck %s
-; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
define i32 @main() {
entry:
diff --git a/llvm/test/Bitcode/extractelement.ll b/llvm/test/Bitcode/extractelement.ll
index 29f5b029200..ba806a4e3f2 100644
--- a/llvm/test/Bitcode/extractelement.ll
+++ b/llvm/test/Bitcode/extractelement.ll
@@ -1,5 +1,5 @@
; RUN: opt < %s -constprop | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR3465
define double @test() {
diff --git a/llvm/test/Bitcode/flags.ll b/llvm/test/Bitcode/flags.ll
index 3760a44bd6f..a996a8a8f8d 100644
--- a/llvm/test/Bitcode/flags.ll
+++ b/llvm/test/Bitcode/flags.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llvm-dis > %t0
; RUN: opt -S < %s > %t1
; RUN: diff %t0 %t1
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR6140
; Make sure the flags are serialized/deserialized properly for both
diff --git a/llvm/test/Bitcode/function-encoding-rel-operands.ll b/llvm/test/Bitcode/function-encoding-rel-operands.ll
index cc2f6aef5e5..14aa01fc1d9 100644
--- a/llvm/test/Bitcode/function-encoding-rel-operands.ll
+++ b/llvm/test/Bitcode/function-encoding-rel-operands.ll
@@ -1,7 +1,7 @@
; Basic sanity test to check that instruction operands are encoded with
; relative IDs.
; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: FUNCTION_BLOCK
; CHECK: INST_BINOP {{.*}}op0=1 op1=1
diff --git a/llvm/test/Bitcode/global-variables.3.2.ll b/llvm/test/Bitcode/global-variables.3.2.ll
index 4a856f199e5..cbba464a298 100644
--- a/llvm/test/Bitcode/global-variables.3.2.ll
+++ b/llvm/test/Bitcode/global-variables.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread global variables attributes of
diff --git a/llvm/test/Bitcode/inalloca.ll b/llvm/test/Bitcode/inalloca.ll
index 445b4a282bf..386a476b455 100644
--- a/llvm/test/Bitcode/inalloca.ll
+++ b/llvm/test/Bitcode/inalloca.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; inalloca should roundtrip.
diff --git a/llvm/test/Bitcode/linkage-types-3.2.ll b/llvm/test/Bitcode/linkage-types-3.2.ll
index 01b195f6c51..06e81b949f1 100644
--- a/llvm/test/Bitcode/linkage-types-3.2.ll
+++ b/llvm/test/Bitcode/linkage-types-3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
; The test checks that LLVM does not silently misread linkage types of
diff --git a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
index c1a9fbefe69..f72fd1578e8 100644
--- a/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
+++ b/llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file
; to llvm-as-3.4. The test checks that LLVM upgrades visibility of symbols
diff --git a/llvm/test/Bitcode/memInstructions.3.2.ll b/llvm/test/Bitcode/memInstructions.3.2.ll
index a8073225a69..67d24f41a10 100644
--- a/llvm/test/Bitcode/memInstructions.3.2.ll
+++ b/llvm/test/Bitcode/memInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread memory related instructions of
diff --git a/llvm/test/Bitcode/metadata.ll b/llvm/test/Bitcode/metadata.ll
index a3550bcacec..1ceb606dd18 100644
--- a/llvm/test/Bitcode/metadata.ll
+++ b/llvm/test/Bitcode/metadata.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
!llvm.foo = !{!0}
!0 = metadata !{i32 42}
diff --git a/llvm/test/Bitcode/old-aliases.ll b/llvm/test/Bitcode/old-aliases.ll
index 13b6d3efa23..b32bc1b18cd 100644
--- a/llvm/test/Bitcode/old-aliases.ll
+++ b/llvm/test/Bitcode/old-aliases.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk)
; from when aliases contained a ConstantExpr.
diff --git a/llvm/test/Bitcode/ptest-new.ll b/llvm/test/Bitcode/ptest-new.ll
index c0ded8b622c..ff284814189 100644
--- a/llvm/test/Bitcode/ptest-new.ll
+++ b/llvm/test/Bitcode/ptest-new.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<2 x i64> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/ptest-old.ll b/llvm/test/Bitcode/ptest-old.ll
index c6c160539c2..5f252aabf73 100644
--- a/llvm/test/Bitcode/ptest-old.ll
+++ b/llvm/test/Bitcode/ptest-old.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<4 x float> %bar) nounwind {
entry:
diff --git a/llvm/test/Bitcode/select.ll b/llvm/test/Bitcode/select.ll
index 3da53857870..a33926c2829 100644
--- a/llvm/test/Bitcode/select.ll
+++ b/llvm/test/Bitcode/select.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define <2 x i32> @main() {
ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)
diff --git a/llvm/test/Bitcode/shuffle.ll b/llvm/test/Bitcode/shuffle.ll
index 65bde6765c2..5b0e9e70e44 100644
--- a/llvm/test/Bitcode/shuffle.ll
+++ b/llvm/test/Bitcode/shuffle.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; <rdar://problem/8622574>
; tests the bitcodereader can handle the case where the reader will initially
diff --git a/llvm/test/Bitcode/tailcall.ll b/llvm/test/Bitcode/tailcall.ll
index ea47df62011..5eed7a39574 100644
--- a/llvm/test/Bitcode/tailcall.ll
+++ b/llvm/test/Bitcode/tailcall.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Check that musttail and tail roundtrip.
diff --git a/llvm/test/Bitcode/terminatorInstructions.3.2.ll b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
index d9e51a5996e..a2285a13871 100644
--- a/llvm/test/Bitcode/terminatorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/terminatorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread terminator instructions from
diff --git a/llvm/test/Bitcode/upgrade-global-ctors.ll b/llvm/test/Bitcode/upgrade-global-ctors.ll
index f75b28b7db1..b01c7520c95 100644
--- a/llvm/test/Bitcode/upgrade-global-ctors.ll
+++ b/llvm/test/Bitcode/upgrade-global-ctors.ll
@@ -1,4 +1,4 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
diff --git a/llvm/test/Bitcode/upgrade-loop-metadata.ll b/llvm/test/Bitcode/upgrade-loop-metadata.ll
index 5c18bd930cc..3c1db98273a 100644
--- a/llvm/test/Bitcode/upgrade-loop-metadata.ll
+++ b/llvm/test/Bitcode/upgrade-loop-metadata.ll
@@ -1,7 +1,7 @@
; Test to make sure loop vectorizer metadata is automatically upgraded.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
define void @_Z28loop_with_vectorize_metadatav() {
entry:
diff --git a/llvm/test/Bitcode/upgrade-tbaa.ll b/llvm/test/Bitcode/upgrade-tbaa.ll
index 0d88fa6ce3a..8dd3b695a67 100644
--- a/llvm/test/Bitcode/upgrade-tbaa.ll
+++ b/llvm/test/Bitcode/upgrade-tbaa.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Function Attrs: nounwind
define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {
diff --git a/llvm/test/Bitcode/use-list-order.ll b/llvm/test/Bitcode/use-list-order.ll
index 33cc13edb05..bb71a8586b7 100644
--- a/llvm/test/Bitcode/use-list-order.ll
+++ b/llvm/test/Bitcode/use-list-order.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
@a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1]
@b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)
diff --git a/llvm/test/Bitcode/vectorInstructions.3.2.ll b/llvm/test/Bitcode/vectorInstructions.3.2.ll
index 5b983ac0f02..4daae418722 100644
--- a/llvm/test/Bitcode/vectorInstructions.3.2.ll
+++ b/llvm/test/Bitcode/vectorInstructions.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread vector operations of
diff --git a/llvm/test/Bitcode/visibility-styles.3.2.ll b/llvm/test/Bitcode/visibility-styles.3.2.ll
index cccc9509e67..aecbc6562cd 100644
--- a/llvm/test/Bitcode/visibility-styles.3.2.ll
+++ b/llvm/test/Bitcode/visibility-styles.3.2.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread visibility styles of
diff --git a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
index fd543c4a968..a09efc70992 100644
--- a/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
+++ b/llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
@@ -1,5 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.
diff --git a/llvm/test/CMakeLists.txt b/llvm/test/CMakeLists.txt
index 59a17b19506..2b3a618a3ae 100644
--- a/llvm/test/CMakeLists.txt
+++ b/llvm/test/CMakeLists.txt
@@ -44,7 +44,6 @@ set(LLVM_TEST_DEPENDS
llvm-rtdyld
llvm-symbolizer
llvm-tblgen
- llvm-uselistorder
llvm-vtabledump
macho-dump
opt
@@ -53,6 +52,7 @@ set(LLVM_TEST_DEPENDS
not
yaml2obj
obj2yaml
+ verify-uselistorder
)
# If Intel JIT events are supported, depend on a tool that tests the listener.
diff --git a/llvm/test/lit.cfg b/llvm/test/lit.cfg
index 6f2632cba5d..b5a982c02d5 100644
--- a/llvm/test/lit.cfg
+++ b/llvm/test/lit.cfg
@@ -228,7 +228,6 @@ for pattern in [r"\bbugpoint\b(?!-)",
r"\bllvm-rtdyld\b",
r"\bllvm-size\b",
r"\bllvm-tblgen\b",
- r"\bllvm-uselistorder\b",
r"\bllvm-vtabledump\b",
r"\bllvm-c-test\b",
r"\bmacho-dump\b",
@@ -236,6 +235,7 @@ for pattern in [r"\bbugpoint\b(?!-)",
r"\bFileCheck\b",
r"\bobj2yaml\b",
r"\byaml2obj\b",
+ r"\bverify-uselistorder\b",
# Handle these specially as they are strings searched
# for during testing.
r"\| \bcount\b",
diff --git a/llvm/tools/CMakeLists.txt b/llvm/tools/CMakeLists.txt
index ef8095b688e..940f656b598 100644
--- a/llvm/tools/CMakeLists.txt
+++ b/llvm/tools/CMakeLists.txt
@@ -43,7 +43,7 @@ add_llvm_tool_subdirectory(llvm-bcanalyzer)
add_llvm_tool_subdirectory(llvm-stress)
add_llvm_tool_subdirectory(llvm-mcmarkup)
-add_llvm_tool_subdirectory(llvm-uselistorder)
+add_llvm_tool_subdirectory(verify-uselistorder)
add_llvm_tool_subdirectory(llvm-symbolizer)
diff --git a/llvm/tools/LLVMBuild.txt b/llvm/tools/LLVMBuild.txt
index 92c7d2b4094..13a08b2d449 100644
--- a/llvm/tools/LLVMBuild.txt
+++ b/llvm/tools/LLVMBuild.txt
@@ -16,7 +16,7 @@
;===------------------------------------------------------------------------===;
[common]
-subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup llvm-uselistorder
+subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup verify-uselistorder
[component_0]
type = Group
diff --git a/llvm/tools/Makefile b/llvm/tools/Makefile
index ed7773d61fa..9ba4608ecad 100644
--- a/llvm/tools/Makefile
+++ b/llvm/tools/Makefile
@@ -32,7 +32,7 @@ PARALLEL_DIRS := opt llvm-as llvm-dis llc llvm-ar llvm-nm llvm-link \
macho-dump llvm-objdump llvm-readobj llvm-rtdyld \
llvm-dwarfdump llvm-cov llvm-size llvm-stress llvm-mcmarkup \
llvm-profdata llvm-symbolizer obj2yaml yaml2obj llvm-c-test \
- llvm-vtabledump llvm-uselistorder
+ llvm-vtabledump verify-uselistorder
# If Intel JIT Events support is configured, build an extra tool to test it.
ifeq ($(USE_INTEL_JITEVENTS), 1)
diff --git a/llvm/tools/llvm-uselistorder/CMakeLists.txt b/llvm/tools/verify-uselistorder/CMakeLists.txt
index c08f8c37c46..260a95adb6a 100644
--- a/llvm/tools/llvm-uselistorder/CMakeLists.txt
+++ b/llvm/tools/verify-uselistorder/CMakeLists.txt
@@ -7,6 +7,6 @@ set(LLVM_LINK_COMPONENTS
Support
)
-add_llvm_tool(llvm-uselistorder
- llvm-uselistorder.cpp
+add_llvm_tool(verify-uselistorder
+ verify-uselistorder.cpp
)
diff --git a/llvm/tools/llvm-uselistorder/LLVMBuild.txt b/llvm/tools/verify-uselistorder/LLVMBuild.txt
index b9d6f10b89e..23957c189c8 100644
--- a/llvm/tools/llvm-uselistorder/LLVMBuild.txt
+++ b/llvm/tools/verify-uselistorder/LLVMBuild.txt
@@ -1,4 +1,4 @@
-;===- ./tools/llvm-uselistorder/LLVMBuild.txt ------------------*- Conf -*--===;
+;===- ./tools/verify-uselistorder/LLVMBuild.txt ----------------*- Conf -*--===;
;
; The LLVM Compiler Infrastructure
;
@@ -17,6 +17,6 @@
[component_0]
type = Tool
-name = llvm-uselistorder
+name = verify-uselistorder
parent = Tools
required_libraries = IRReader BitWriter Support
diff --git a/llvm/tools/llvm-uselistorder/Makefile b/llvm/tools/verify-uselistorder/Makefile
index 5a3727e52d2..90d2aa89128 100644
--- a/llvm/tools/llvm-uselistorder/Makefile
+++ b/llvm/tools/verify-uselistorder/Makefile
@@ -1,4 +1,4 @@
-##===- tools/llvm-uselistorder/Makefile --------------------*- Makefile -*-===##
+##===- tools/verify-uselistorder/Makefile ------------------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
@@ -8,7 +8,7 @@
##===----------------------------------------------------------------------===##
LEVEL := ../..
-TOOLNAME := llvm-uselistorder
+TOOLNAME := verify-uselistorder
LINK_COMPONENTS := AsmParser BitReader BitWriter Core IRReader Support
# This tool has no plugins, optimize startup time.
diff --git a/llvm/tools/llvm-uselistorder/llvm-uselistorder.cpp b/llvm/tools/verify-uselistorder/verify-uselistorder.cpp
index 0f817d2bf38..37d7f5f52a5 100644
--- a/llvm/tools/llvm-uselistorder/llvm-uselistorder.cpp
+++ b/llvm/tools/verify-uselistorder/verify-uselistorder.cpp
@@ -1,4 +1,4 @@
-//===- llvm-uselistorder.cpp - The LLVM Modular Optimizer -----------------===//
+//===- verify-uselistorder.cpp - The LLVM Modular Optimizer ---------------===//
//
// The LLVM Compiler Infrastructure
//
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