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| author | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:03 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:03 +0000 |
| commit | a0dce246eddc3c0818636f5177beca2943bb3d22 (patch) | |
| tree | a4792eadc9a3fb6586af62fe63eaeaee273d5972 | |
| parent | 3971d3dc75f80b972863c5a336ca28ffce5c24eb (diff) | |
| download | bcm5719-llvm-a0dce246eddc3c0818636f5177beca2943bb3d22.tar.gz bcm5719-llvm-a0dce246eddc3c0818636f5177beca2943bb3d22.zip | |
[ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW should only be translated when the instruction uses WSP, not SP. Vice versa for UXTX and 64-bit instructions.
llvm-svn: 205886
| -rw-r--r-- | llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/MC/ARM64/arithmetic-encoding.s | 12 |
2 files changed, 10 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp index d17182da761..7d1dd50b720 100644 --- a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp +++ b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp @@ -1097,8 +1097,10 @@ void ARM64InstPrinter::printExtend(const MCInst *MI, unsigned OpNum, if (ExtType == ARM64_AM::UXTW || ExtType == ARM64_AM::UXTX) { unsigned Dest = MI->getOperand(0).getReg(); unsigned Src1 = MI->getOperand(1).getReg(); - if (Dest == ARM64::SP || Dest == ARM64::WSP || Src1 == ARM64::SP || - Src1 == ARM64::WSP) { + if ( ((Dest == ARM64::SP || Src1 == ARM64::SP) && + ExtType == ARM64_AM::UXTX) || + ((Dest == ARM64::WSP || Src1 == ARM64::WSP) && + ExtType == ARM64_AM::UXTW) ) { if (ShiftVal != 0) O << ", lsl #" << ShiftVal; return; diff --git a/llvm/test/MC/ARM64/arithmetic-encoding.s b/llvm/test/MC/ARM64/arithmetic-encoding.s index 3177ca49ee0..6d28bce5a83 100644 --- a/llvm/test/MC/ARM64/arithmetic-encoding.s +++ b/llvm/test/MC/ARM64/arithmetic-encoding.s @@ -368,8 +368,8 @@ foo: ; CHECK: subs x3, sp, x9, lsl #2 ; encoding: [0xe3,0x6b,0x29,0xeb] ; CHECK: cmp wsp, w8 ; encoding: [0xff,0x43,0x28,0x6b] ; CHECK: cmp wsp, w8 ; encoding: [0xff,0x43,0x28,0x6b] -; CHECK: cmp sp, w8 ; encoding: [0xff,0x43,0x28,0xeb] -; CHECK: cmp sp, w8 ; encoding: [0xff,0x43,0x28,0xeb] +; CHECK: cmp sp, w8, uxtw ; encoding: [0xff,0x43,0x28,0xeb] +; CHECK: cmp sp, w8, uxtw ; encoding: [0xff,0x43,0x28,0xeb] sub wsp, w9, w8, uxtw sub w1, wsp, w8, uxtw @@ -383,11 +383,11 @@ foo: ; CHECK: sub wsp, w9, w8 ; encoding: [0x3f,0x41,0x28,0x4b] ; CHECK: sub w1, wsp, w8 ; encoding: [0xe1,0x43,0x28,0x4b] ; CHECK: sub wsp, wsp, w8 ; encoding: [0xff,0x43,0x28,0x4b] -; CHECK: sub sp, x9, w8 ; encoding: [0x3f,0x41,0x28,0xcb] -; CHECK: sub x1, sp, w8 ; encoding: [0xe1,0x43,0x28,0xcb] -; CHECK: sub sp, sp, w8 ; encoding: [0xff,0x43,0x28,0xcb] +; CHECK: sub sp, x9, w8, uxtw ; encoding: [0x3f,0x41,0x28,0xcb] +; CHECK: sub x1, sp, w8, uxtw ; encoding: [0xe1,0x43,0x28,0xcb] +; CHECK: sub sp, sp, w8, uxtw ; encoding: [0xff,0x43,0x28,0xcb] ; CHECK: subs w1, wsp, w8 ; encoding: [0xe1,0x43,0x28,0x6b] -; CHECK: subs x1, sp, w8 ; encoding: [0xe1,0x43,0x28,0xeb] +; CHECK: subs x1, sp, w8, uxtw ; encoding: [0xe1,0x43,0x28,0xeb] ;==---------------------------------------------------------------------------== ; Signed/Unsigned divide |
