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authorMatthias Braun <matze@braunis.de>2017-09-09 00:52:45 +0000
committerMatthias Braun <matze@braunis.de>2017-09-09 00:52:45 +0000
commita09d18deb00bebf2376ff45a8e4769376ba7a135 (patch)
treea98e343c1b9a03c383a8cea4f0e77fd2983c281f
parenta5225e8cb087943bb65f245e1d5df1824a999582 (diff)
downloadbcm5719-llvm-a09d18deb00bebf2376ff45a8e4769376ba7a135.tar.gz
bcm5719-llvm-a09d18deb00bebf2376ff45a8e4769376ba7a135.zip
RegAllocFast: Move vector to class level to avoid reallocation; NFC
llvm-svn: 312845
-rw-r--r--llvm/lib/CodeGen/RegAllocFast.cpp7
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index ae0114f326f..ef3cc16cd05 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -112,6 +112,9 @@ namespace {
// PhysRegState - One of the RegState enums, or a virtreg.
std::vector<unsigned> PhysRegState;
+ SmallVector<unsigned, 16> VirtDead;
+ SmallVector<MachineInstr*, 32> Coalesced;
+
// Set of register units.
typedef SparseSet<unsigned> UsedInInstrSet;
@@ -810,8 +813,8 @@ void RAFast::AllocateBasicBlock() {
if (MRI->isAllocatable(LI.PhysReg))
definePhysReg(*MII, LI.PhysReg, regReserved);
- SmallVector<unsigned, 8> VirtDead;
- SmallVector<MachineInstr*, 32> Coalesced;
+ VirtDead.clear();
+ Coalesced.clear();
// Otherwise, sequentially allocate each instruction in the MBB.
while (MII != MBB->end()) {
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