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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-18 21:54:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-05-18 21:54:16 +0000 |
| commit | 9fc8593a774941bdd18b20e987cfd62aa353bee8 (patch) | |
| tree | 57c32f9e66978c9640674b702a4c20edf5f2a6fa | |
| parent | d40bc5f788ac926a56daf7e5a0ce5b347f2f8993 (diff) | |
| download | bcm5719-llvm-9fc8593a774941bdd18b20e987cfd62aa353bee8.tar.gz bcm5719-llvm-9fc8593a774941bdd18b20e987cfd62aa353bee8.zip | |
DAG: Fix crash on shift with large shift amounts
Fixes bug 37521.
llvm-svn: 332774
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/bug37521.ll | 29 |
2 files changed, 31 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp index 20f9a7e6514..6a8ef957ea8 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp @@ -1073,11 +1073,11 @@ SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { EVT NVT = EVT::getIntegerVT(*DAG.getContext(), LVT.getSizeInBits() + HVT.getSizeInBits()); + EVT ShiftAmtVT = TLI.getShiftAmountTy(NVT, DAG.getDataLayout(), false); Lo = DAG.getNode(ISD::ZERO_EXTEND, dlLo, NVT, Lo); Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi); Hi = DAG.getNode(ISD::SHL, dlHi, NVT, Hi, - DAG.getConstant(LVT.getSizeInBits(), dlHi, - TLI.getShiftAmountTy(NVT, DAG.getDataLayout()))); + DAG.getConstant(LVT.getSizeInBits(), dlHi, ShiftAmtVT)); return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi); } diff --git a/llvm/test/CodeGen/X86/bug37521.ll b/llvm/test/CodeGen/X86/bug37521.ll new file mode 100644 index 00000000000..14e547acd76 --- /dev/null +++ b/llvm/test/CodeGen/X86/bug37521.ll @@ -0,0 +1,29 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s + +@a = external global <16 x float>, align 64 + +declare void @goo(<2 x i256>) + +define void @foo() #0 { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: +; CHECK-NEXT: subq $24, %rsp +; CHECK-NEXT: movq a+{{.*}}(%rip), %r9 +; CHECK-NEXT: movq a+{{.*}}(%rip), %r8 +; CHECK-NEXT: movq a+{{.*}}(%rip), %rcx +; CHECK-NEXT: movq a+{{.*}}(%rip), %rdx +; CHECK-NEXT: movq a+{{.*}}(%rip), %rsi +; CHECK-NEXT: movq {{.*}}(%rip), %rdi +; CHECK-NEXT: vmovaps a+{{.*}}(%rip), %xmm0 +; CHECK-NEXT: vmovups %xmm0, (%rsp) +; CHECK-NEXT: callq goo +; CHECK-NEXT: addq $24, %rsp +; CHECK-NEXT: retq + %k = bitcast <16 x float>* @a to <2 x i256>* + %load = load <2 x i256>, <2 x i256>* %k, align 64 + call void @goo(<2 x i256> %load) + ret void +} + +attributes #0 = { nounwind "target-features"="+avx512bw" } |
