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author | Dale Johannesen <dalej@apple.com> | 2010-05-27 20:12:41 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2010-05-27 20:12:41 +0000 |
commit | 9e43c07bc566e9a6795f60a1ee09a425ba9da12b (patch) | |
tree | fdbed73d3bf60d4676523efa4ec055f38a0d863e | |
parent | d9225cee20fdccc6d49fbdecd70be9254a877333 (diff) | |
download | bcm5719-llvm-9e43c07bc566e9a6795f60a1ee09a425ba9da12b.tar.gz bcm5719-llvm-9e43c07bc566e9a6795f60a1ee09a425ba9da12b.zip |
Mark some math lib intrinsic nodes Legal on SSE4.1.
No functional effect as these nodes are not generated yet.
llvm-svn: 104879
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9d49941dc8f..b46fc740e45 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -825,6 +825,17 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) } if (Subtarget->hasSSE41()) { + setOperationAction(ISD::FFLOOR, MVT::f32, Legal); + setOperationAction(ISD::FCEIL, MVT::f32, Legal); + setOperationAction(ISD::FTRUNC, MVT::f32, Legal); + setOperationAction(ISD::FRINT, MVT::f32, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); + setOperationAction(ISD::FFLOOR, MVT::f64, Legal); + setOperationAction(ISD::FCEIL, MVT::f64, Legal); + setOperationAction(ISD::FTRUNC, MVT::f64, Legal); + setOperationAction(ISD::FRINT, MVT::f64, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); + // FIXME: Do we need to handle scalar-to-vector here? setOperationAction(ISD::MUL, MVT::v4i32, Legal); |