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authorSanjay Patel <spatel@rotateright.com>2019-02-19 23:58:02 +0000
committerSanjay Patel <spatel@rotateright.com>2019-02-19 23:58:02 +0000
commit9cf04addf39ccfd913d926ac1ae698d470f74e29 (patch)
tree01b4340dbb477fa9f95129af3ec7604d8390f4d1
parent952d234d00b1e67a2d51e3d13ac734a9e2e99f3c (diff)
downloadbcm5719-llvm-9cf04addf39ccfd913d926ac1ae698d470f74e29.tar.gz
bcm5719-llvm-9cf04addf39ccfd913d926ac1ae698d470f74e29.zip
[InstSimplify] add vector tests for fcmp+fabs; NFC
llvm-svn: 354404
-rw-r--r--llvm/test/Transforms/InstSimplify/floating-point-compare.ll63
1 files changed, 63 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstSimplify/floating-point-compare.ll b/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
index 14e6ccee7b2..77db0522c98 100644
--- a/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
+++ b/llvm/test/Transforms/InstSimplify/floating-point-compare.ll
@@ -173,6 +173,7 @@ declare half @llvm.fabs.f16(half)
declare float @llvm.fabs.f32(float)
declare double @llvm.fabs.f64(double)
declare <2 x float> @llvm.fabs.v2f32(<2 x float>)
+declare <3 x float> @llvm.fabs.v3f32(<3 x float>)
declare <2 x double> @llvm.fabs.v2f64(<2 x double>)
declare float @llvm.sqrt.f32(float)
declare double @llvm.powi.f64(double,i32)
@@ -378,6 +379,68 @@ define <2 x i1> @fabs_nnan_is_not_negative_vec(<2 x double> %x) {
ret <2 x i1> %cmp
}
+define <2 x i1> @fabs_is_not_negative_negzero(<2 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_negzero(
+; CHECK-NEXT: ret <2 x i1> zeroinitializer
+;
+ %abs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %V)
+ %cmp = fcmp olt <2 x float> %abs, <float -0.0, float -0.0>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @fabs_is_not_negative_poszero(<2 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_poszero(
+; CHECK-NEXT: ret <2 x i1> zeroinitializer
+;
+ %abs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %V)
+ %cmp = fcmp olt <2 x float> %abs, <float 0.0, float 0.0>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @fabs_is_not_negative_anyzero(<2 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_anyzero(
+; CHECK-NEXT: [[ABS:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[V:%.*]])
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <2 x float> [[ABS]], <float 0.000000e+00, float -0.000000e+00>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %abs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %V)
+ %cmp = fcmp olt <2 x float> %abs, <float 0.0, float -0.0>
+ ret <2 x i1> %cmp
+}
+
+define <3 x i1> @fabs_is_not_negative_negzero_undef(<3 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_negzero_undef(
+; CHECK-NEXT: [[ABS:%.*]] = call <3 x float> @llvm.fabs.v3f32(<3 x float> [[V:%.*]])
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <3 x float> [[ABS]], <float -0.000000e+00, float -0.000000e+00, float undef>
+; CHECK-NEXT: ret <3 x i1> [[CMP]]
+;
+ %abs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %V)
+ %cmp = fcmp olt <3 x float> %abs, <float -0.0, float -0.0, float undef>
+ ret <3 x i1> %cmp
+}
+
+define <3 x i1> @fabs_is_not_negative_poszero_undef(<3 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_poszero_undef(
+; CHECK-NEXT: [[ABS:%.*]] = call <3 x float> @llvm.fabs.v3f32(<3 x float> [[V:%.*]])
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <3 x float> [[ABS]], <float 0.000000e+00, float 0.000000e+00, float undef>
+; CHECK-NEXT: ret <3 x i1> [[CMP]]
+;
+ %abs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %V)
+ %cmp = fcmp olt <3 x float> %abs, <float 0.0, float 0.0, float undef>
+ ret <3 x i1> %cmp
+}
+
+define <3 x i1> @fabs_is_not_negative_anyzero_undef(<3 x float> %V) {
+; CHECK-LABEL: @fabs_is_not_negative_anyzero_undef(
+; CHECK-NEXT: [[ABS:%.*]] = call <3 x float> @llvm.fabs.v3f32(<3 x float> [[V:%.*]])
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <3 x float> [[ABS]], <float 0.000000e+00, float -0.000000e+00, float undef>
+; CHECK-NEXT: ret <3 x i1> [[CMP]]
+;
+ %abs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %V)
+ %cmp = fcmp olt <3 x float> %abs, <float 0.0, float -0.0, float undef>
+ ret <3 x i1> %cmp
+}
+
define i1 @orderedLessZeroSelect(float, float) {
; CHECK-LABEL: @orderedLessZeroSelect(
; CHECK-NEXT: ret i1 true
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