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author | Sanjay Patel <spatel@rotateright.com> | 2019-07-10 14:41:47 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2019-07-10 14:41:47 +0000 |
commit | 9cd82a4fbd2ded1e4d6b3815d153b28057ee1e75 (patch) | |
tree | 57f75edfa589a15c6223ea8f8bb51dc6c1922d86 | |
parent | c44a23f8f450bdb8cec784ef0c4f0ca502b7524f (diff) | |
download | bcm5719-llvm-9cd82a4fbd2ded1e4d6b3815d153b28057ee1e75.tar.gz bcm5719-llvm-9cd82a4fbd2ded1e4d6b3815d153b28057ee1e75.zip |
[InferFunctionAttrs] add/adjust tests for dereferenceable; NFC
Based on review comments for D64258.
llvm-svn: 365636
-rw-r--r-- | llvm/test/Transforms/InferFunctionAttrs/dereferenceable.ll | 41 |
1 files changed, 38 insertions, 3 deletions
diff --git a/llvm/test/Transforms/InferFunctionAttrs/dereferenceable.ll b/llvm/test/Transforms/InferFunctionAttrs/dereferenceable.ll index ffcb8270b90..f6580826bd1 100644 --- a/llvm/test/Transforms/InferFunctionAttrs/dereferenceable.ll +++ b/llvm/test/Transforms/InferFunctionAttrs/dereferenceable.ll @@ -107,10 +107,11 @@ exit: ret void } -; The 1st load can trap, so the 2nd and 3rd may never execute. +; The volatile load can't be used to prove a non-volatile access is allowed. +; The 2nd and 3rd loads may never execute. -define void @volatile_can_trap(i16* %ptr) { -; CHECK-LABEL: @volatile_can_trap(i16* %ptr) +define void @volatile_is_not_dereferenceable(i16* %ptr) { +; CHECK-LABEL: @volatile_is_not_dereferenceable(i16* %ptr) %arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2 @@ -120,6 +121,20 @@ define void @volatile_can_trap(i16* %ptr) { ret void } +declare void @may_not_return() + +define void @not_guaranteed_to_transfer_execution(i16* %ptr) { +; CHECK-LABEL: @not_guaranteed_to_transfer_execution(i16* %ptr) + %arrayidx0 = getelementptr i16, i16* %ptr, i64 0 + %arrayidx1 = getelementptr i16, i16* %ptr, i64 1 + %arrayidx2 = getelementptr i16, i16* %ptr, i64 2 + %t0 = load i16, i16* %arrayidx0 + call void @may_not_return() + %t1 = load i16, i16* %arrayidx1 + %t2 = load i16, i16* %arrayidx2 + ret void +} + ; We must have consecutive accesses. define void @variable_gep_index(i8* %unused, i8* %ptr, i64 %variable_index) { @@ -241,3 +256,23 @@ define void @negative_offset(i32* %arg) { %t1 = load float, float* %arrayidx1 ret void } + +define void @stores(i32* %arg) { +; CHECK-LABEL: @stores(i32* %arg) + %ptr = bitcast i32* %arg to float* + %arrayidx0 = getelementptr float, float* %ptr, i64 0 + %arrayidx1 = getelementptr float, float* %ptr, i64 1 + store float 1.0, float* %arrayidx0 + store float 2.0, float* %arrayidx1 + ret void +} + +define void @load_store(i32* %arg) { +; CHECK-LABEL: @load_store(i32* %arg) + %ptr = bitcast i32* %arg to float* + %arrayidx0 = getelementptr float, float* %ptr, i64 0 + %arrayidx1 = getelementptr float, float* %ptr, i64 1 + %t1 = load float, float* %arrayidx0 + store float 2.0, float* %arrayidx1 + ret void +} |