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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-10-30 22:38:07 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-10-30 22:38:07 +0000 |
| commit | 9cd7abbcff7699f5b74e2e5242d7ff5a18c77f49 (patch) | |
| tree | 2ed03302e321775a45b66f8d0f07753378401dfa | |
| parent | 0c3a7c2015d9f93755c7c161d50e047397c72b1b (diff) | |
| download | bcm5719-llvm-9cd7abbcff7699f5b74e2e5242d7ff5a18c77f49.tar.gz bcm5719-llvm-9cd7abbcff7699f5b74e2e5242d7ff5a18c77f49.zip | |
Fix unused variable warnings. NFCI.
llvm-svn: 316964
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 0e0b83fd875..5a9e798958a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2582,7 +2582,6 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known, } // TODO ISD::SIGN_EXTEND_VECTOR_INREG case ISD::SIGN_EXTEND: { - EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1); // If the sign bit is known to be zero or one, then sext will extend // it to the top bits, else it will just zext. @@ -2590,13 +2589,11 @@ void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known, break; } case ISD::ANY_EXTEND: { - EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits(Op.getOperand(0), Known, Depth+1); Known = Known.zext(BitWidth); break; } case ISD::TRUNCATE: { - EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1); Known = Known.trunc(BitWidth); break; |

