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| author | Manoj Gupta <manojgupta@google.com> | 2017-09-27 09:29:57 +0000 |
|---|---|---|
| committer | Manoj Gupta <manojgupta@google.com> | 2017-09-27 09:29:57 +0000 |
| commit | 9c277321e3dcc9fe979e2407320a902a2b7cf513 (patch) | |
| tree | ef331f46ae9845d732a49c7ef4199b68865c9a55 | |
| parent | aaf54714296a93334bd95d4b609a5176a8308f3b (diff) | |
| download | bcm5719-llvm-9c277321e3dcc9fe979e2407320a902a2b7cf513.tar.gz bcm5719-llvm-9c277321e3dcc9fe979e2407320a902a2b7cf513.zip | |
[Builtins] ARM: Fix msr assembly instruction use for Thumb2.
Summary:
MSR instruction in Thumb2 does not support immediate operand.
Fix this by moving the condition for V7-M to Thumb2 since V7-M support
Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can
be assembled in Thumb2 mode. (This is split out from the review D38227).
Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, kristof.beyls
Reviewed By: compnerd
Subscribers: aemerson, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D38268
llvm-svn: 314284
| -rw-r--r-- | compiler-rt/lib/builtins/arm/aeabi_cdcmp.S | 2 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/aeabi_cfcmp.S | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S index b06f294e29e..f18cfa46b99 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S @@ -48,7 +48,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmpeq) // NaN has been ruled out, so __aeabi_cdcmple can't trap bne __aeabi_cdcmple -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) +#if defined(USE_THUMB_2) mov ip, #APSR_C msr APSR_nzcvq, ip #else diff --git a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S index 7bc84073f6f..fc0dbcaa069 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S @@ -48,7 +48,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) // NaN has been ruled out, so __aeabi_cfcmple can't trap bne __aeabi_cfcmple -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) +#if defined(USE_THUMB_2) mov ip, #APSR_C msr APSR_nzcvq, ip #else |
