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| author | James Molloy <jmolloy@google.com> | 2019-10-04 17:15:25 +0000 |
|---|---|---|
| committer | James Molloy <jmolloy@google.com> | 2019-10-04 17:15:25 +0000 |
| commit | 9baac83a2e714962baafd20d9e29aef9dd21a4f5 (patch) | |
| tree | b2413edfedac1bfed1af169227331b7337396b41 | |
| parent | 68b805212134ae16769e38af7da4861bb8b809dd (diff) | |
| download | bcm5719-llvm-9baac83a2e714962baafd20d9e29aef9dd21a4f5.tar.gz bcm5719-llvm-9baac83a2e714962baafd20d9e29aef9dd21a4f5.zip | |
[ModuloSchedule] Do not remap terminators
This is a trivial point fix. Terminator instructions aren't scheduled, so
we shouldn't expect to be able to remap them.
This doesn't affect Hexagon and PPC because their terminators are always
hardware loop backbranches that have no register operands.
llvm-svn: 373762
| -rw-r--r-- | llvm/lib/CodeGen/ModuloSchedule.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp index d891d644664..7ce3c586180 100644 --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -1314,7 +1314,7 @@ void KernelRewriter::rewrite() { // Now remap every instruction in the loop. for (MachineInstr &MI : *BB) { - if (MI.isPHI()) + if (MI.isPHI() || MI.isTerminator()) continue; for (MachineOperand &MO : MI.uses()) { if (!MO.isReg() || MO.getReg().isPhysical() || MO.isImplicit()) |
