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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-06 23:02:00 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-06 23:02:00 +0000 |
| commit | 9b3d2535bfac91dfceef1b439156417efbbefda0 (patch) | |
| tree | 81a64abbcf37238a2f70ff4632dc2f6edb5e384c | |
| parent | 6e088d810e99eca9e14ddcdf332eb4793e0bbae1 (diff) | |
| download | bcm5719-llvm-9b3d2535bfac91dfceef1b439156417efbbefda0.tar.gz bcm5719-llvm-9b3d2535bfac91dfceef1b439156417efbbefda0.zip | |
R600/SI: Add pattern for AMDGPU.trunc intrinsic
Patch by: Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 181263
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index fcae109fea7..691a0406455 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -624,7 +624,9 @@ defm V_MOV_FED_B32 : VOP1_32 <0x00000009, "V_MOV_FED_B32", []>; defm V_FRACT_F32 : VOP1_32 <0x00000020, "V_FRACT_F32", [(set f32:$dst, (AMDGPUfract f32:$src0))] >; -defm V_TRUNC_F32 : VOP1_32 <0x00000021, "V_TRUNC_F32", []>; +defm V_TRUNC_F32 : VOP1_32 <0x00000021, "V_TRUNC_F32", + [(set f32:$dst, (int_AMDGPU_trunc f32:$src0))] +>; defm V_CEIL_F32 : VOP1_32 <0x00000022, "V_CEIL_F32", [(set f32:$dst, (fceil f32:$src0))] >; |
