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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2016-04-27 01:51:38 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2016-04-27 01:51:38 +0000
commit9a0c9adade7a1d111ebeb4598c03b4c438f06e4d (patch)
treeb110889228759b0d63373a254e27c2e8de3abe31
parent4960919723aa4f1e0d5dc643e1ad0f4b6947495f (diff)
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[X86] Set AddPristinesAndCSRs to FixupBW LivePhysRegs. NFC.
We run after PEI, so we need to AddPristinesAndCSRs. In practice, that makes no difference here, because we only ask about liveness of super-registers of defined GR8/GR16 registers, so they can't be pristine. Still, it's the correct thing to do. Thanks to Quentin for noticing! Follow-up to r267495. llvm-svn: 267658
-rw-r--r--llvm/lib/Target/X86/X86FixupBWInsts.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
index 52037692185..30ce4b6282e 100644
--- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp
+++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
@@ -244,7 +244,8 @@ void FixupBWInstPass::processBasicBlock(MachineFunction &MF,
// Start computing liveness for this block. We iterate from the end to be able
// to update this for each instruction.
LiveRegs.clear();
- LiveRegs.addLiveOuts(&MBB);
+ // We run after PEI, so we need to AddPristinesAndCSRs.
+ LiveRegs.addLiveOuts(&MBB, /*AddPristinesAndCSRs=*/true);
for (auto I = MBB.rbegin(); I != MBB.rend(); ++I) {
MachineInstr *NewMI = nullptr;
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