revert this patch for now, because Codegen does still want to generate SSE code,

for example in the case of va-args. XFAIL associated tests.

llvm-svn: 62972

3 files changed, 8 insertions, 0 deletions

diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 99708e04cf9..f74008d4588 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -331,6 +331,10 @@ X86Subtarget::X86Subtarget(const Module &M, const std::string &FS, bool is64Bit)
   // are enabled.  These are available on all x86-64 CPUs.
   if (Is64Bit) {
     HasX86_64 = true;
++#if 1
+     if (X86SSELevel < SSE2)
+       X86SSELevel = SSE2;
++#endif
   }
   DOUT << "Subtarget features: SSELevel " << X86SSELevel
        << ", 3DNowLevel " << X863DNowLevel
diff --git a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
index b12e4137dbd..99826dd7159 100644
--- a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
+++ b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
@@ -1,5 +1,7 @@
 ; RUN: llvm-as < %s | llc -march=x86-64 -mattr=-sse,-sse2 | not grep xmm
 ; PR3402
+; reverted
+; XFAIL: *
 target datalayout =
 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/FrontendC/2009-01-25-NoSSE.c b/llvm/test/FrontendC/2009-01-25-NoSSE.c
index 1585f4b007b..92612cd4587 100644
--- a/llvm/test/FrontendC/2009-01-25-NoSSE.c
+++ b/llvm/test/FrontendC/2009-01-25-NoSSE.c
@@ -2,6 +2,8 @@
 // PR3402
 // This is a test for x86/x86-64, add your target below if it FAILs.
 // XFAIL: alpha|ia64|arm|powerpc|sparc 
+// reverted
+// XFAIL: *
 typedef unsigned long __kernel_size_t;
 typedef __kernel_size_t size_t;
 void *memset(void *s, int c, size_t n);