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authorAkira Hatanaka <ahatanaka@mips.com>2012-03-08 01:59:33 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-03-08 01:59:33 +0000
commit956dd2261e1b48648b3224f1a33de3fceb78e710 (patch)
tree01f4581a0ba1f0825fbdcefe02ba25f2f5a1f23c
parent1c66a0e1c0ca7fd8635a5de13a3d91da6042420b (diff)
downloadbcm5719-llvm-956dd2261e1b48648b3224f1a33de3fceb78e710.tar.gz
bcm5719-llvm-956dd2261e1b48648b3224f1a33de3fceb78e710.zip
Set minimum function alignment to 3 if target is Mips64.
llvm-svn: 152282
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index dc894d9e31b..5703ea9df09 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -250,7 +250,7 @@ MipsTargetLowering(MipsTargetMachine &TM)
setTargetDAGCombine(ISD::AND);
setTargetDAGCombine(ISD::OR);
- setMinFunctionAlignment(2);
+ setMinFunctionAlignment(HasMips64 ? 3 : 2);
setStackPointerRegisterToSaveRestore(IsN64 ? Mips::SP_64 : Mips::SP);
computeRegisterProperties();
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