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author | Dan Gohman <dan433584@gmail.com> | 2015-11-18 17:05:35 +0000 |
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committer | Dan Gohman <dan433584@gmail.com> | 2015-11-18 17:05:35 +0000 |
commit | 94ef41ff1d93e6380f63f5715430624094842b31 (patch) | |
tree | 911952623c0804b91724a87f934c3f63014cb268 | |
parent | bbf5a00de13580dd65f6bdf77c446b1f2faf69dd (diff) | |
download | bcm5719-llvm-94ef41ff1d93e6380f63f5715430624094842b31.tar.gz bcm5719-llvm-94ef41ff1d93e6380f63f5715430624094842b31.zip |
[WebAssembly] Add more whitespace characters to prettify the assembly output.
llvm-svn: 253472
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td | 4 | ||||
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td | 14 |
2 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td index 7ecbff831cc..aec614e9ea3 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td @@ -24,7 +24,7 @@ def : I<(outs), (ins i64imm:$amt1, i64imm:$amt2), multiclass CALL<WebAssemblyRegClass vt> { def CALL_#vt : I<(outs vt:$dst), (ins global:$callee, variable_ops), [(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))], - "call\t$callee, $dst">; + "call \t$callee, $dst">; def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops), [(set vt:$dst, (WebAssemblycall1 I32:$callee))], "call_indirect\t$callee, $dst">; @@ -37,7 +37,7 @@ let Uses = [SP32, SP64], isCall = 1 in { def CALL_VOID : I<(outs), (ins global:$callee, variable_ops), [(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))], - "call\t$callee">; + "call \t$callee">; def CALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops), [(WebAssemblycall0 I32:$callee)], "call_indirect\t$callee">; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td index dd63e98efe9..998afbe51cb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td @@ -15,11 +15,11 @@ let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { def BR_IF : I<(outs), (ins I32:$a, bb_op:$dst), [(brcond I32:$a, bb:$dst)], - "br_if\t$a, $dst">; + "br_if \t$a, $dst">; let isBarrier = 1 in { def BR : I<(outs), (ins bb_op:$dst), [(br bb:$dst)], - "br\t$dst">; + "br \t$dst">; } // isBarrier = 1 } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1 @@ -29,19 +29,19 @@ def BR : I<(outs), (ins bb_op:$dst), let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops), [(WebAssemblyswitch I32:$index)], - "switch\t$index">; + "switch \t$index">; def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops), [(WebAssemblyswitch I64:$index)], - "switch\t$index">; + "switch \t$index">; } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 // Placemarkers to indicate the start of a block or loop scope. -def BLOCK : I<(outs), (ins bb_op:$dst), [], "block\t$dst">; -def LOOP : I<(outs), (ins bb_op:$dst), [], "loop\t$dst">; +def BLOCK : I<(outs), (ins bb_op:$dst), [], "block \t$dst">; +def LOOP : I<(outs), (ins bb_op:$dst), [], "loop \t$dst">; multiclass RETURN<WebAssemblyRegClass vt> { def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)], - "return\t$val">; + "return \t$val">; } let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { |