diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-13 12:22:58 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-13 12:22:58 +0000 |
| commit | 93bd7187f4b4db64aff47a25e783aa11954cb085 (patch) | |
| tree | 345fb968d8e341adb3b53dbf11b0bbae6fad59a6 | |
| parent | 8e6adf581bcb8452e9508e7d4d21b2579839e1d3 (diff) | |
| download | bcm5719-llvm-93bd7187f4b4db64aff47a25e783aa11954cb085.tar.gz bcm5719-llvm-93bd7187f4b4db64aff47a25e783aa11954cb085.zip | |
[X86][SSE41] createVariablePermute v2X64 - PCMPEQQ can test for index 0/1 and select between them.
llvm-svn: 327385
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/var-permute-128.ll | 29 |
2 files changed, 22 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 13f98f8b23d..da588b0f11f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -8039,6 +8039,14 @@ SDValue createVariablePermute(MVT VT, SDValue SrcVec, SDValue IndicesVec, IndicesVec = DAG.getNode(ISD::ADD, DL, IndicesVT, IndicesVec, IndicesVec); Opcode = X86ISD::VPERMILPV; ShuffleVT = MVT::v2f64; + } else if (Subtarget.hasSSE41()) { + // SSE41 can compare v2i64 - select between indices 0 and 1. + return DAG.getSelectCC( + DL, IndicesVec, + getZeroVector(IndicesVT.getSimpleVT(), Subtarget, DAG, DL), + DAG.getVectorShuffle(VT, DL, SrcVec, SrcVec, {0, 0}), + DAG.getVectorShuffle(VT, DL, SrcVec, SrcVec, {1, 1}), + ISD::CondCode::SETEQ); } break; case MVT::v32i8: diff --git a/llvm/test/CodeGen/X86/var-permute-128.ll b/llvm/test/CodeGen/X86/var-permute-128.ll index c81892e4b1d..dc943c0771c 100644 --- a/llvm/test/CodeGen/X86/var-permute-128.ll +++ b/llvm/test/CodeGen/X86/var-permute-128.ll @@ -40,14 +40,13 @@ define <2 x i64> @var_shuffle_v2i64(<2 x i64> %v, <2 x i64> %indices) nounwind { ; ; SSE41-LABEL: var_shuffle_v2i64: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %xmm1, %rax -; SSE41-NEXT: andl $1, %eax -; SSE41-NEXT: pextrq $1, %xmm1, %rcx -; SSE41-NEXT: andl $1, %ecx -; SSE41-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) -; SSE41-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero -; SSE41-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero -; SSE41-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; SSE41-NEXT: pxor %xmm2, %xmm2 +; SSE41-NEXT: pcmpeqq %xmm1, %xmm2 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,1,0,1] +; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3] +; SSE41-NEXT: movdqa %xmm2, %xmm0 +; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1 +; SSE41-NEXT: movapd %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: var_shuffle_v2i64: @@ -402,13 +401,13 @@ define <2 x double> @var_shuffle_v2f64(<2 x double> %v, <2 x i64> %indices) noun ; ; SSE41-LABEL: var_shuffle_v2f64: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %xmm1, %rax -; SSE41-NEXT: andl $1, %eax -; SSE41-NEXT: pextrq $1, %xmm1, %rcx -; SSE41-NEXT: andl $1, %ecx -; SSE41-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) -; SSE41-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero -; SSE41-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0] +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqq %xmm1, %xmm0 +; SSE41-NEXT: movddup {{.*#+}} xmm1 = xmm2[0,0] +; SSE41-NEXT: movhlps {{.*#+}} xmm2 = xmm2[1,1] +; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2 +; SSE41-NEXT: movapd %xmm2, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: var_shuffle_v2f64: |
