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| author | Craig Topper <craig.topper@intel.com> | 2017-12-16 21:12:23 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-16 21:12:23 +0000 |
| commit | 93253e189c1bc8d058952025d605829adc9473db (patch) | |
| tree | 0128e442373ce3ab1cd6948253dced962dfb6c85 | |
| parent | 1260a4e826ecff1ba6a9076336fb735cc90dcd76 (diff) | |
| download | bcm5719-llvm-93253e189c1bc8d058952025d605829adc9473db.tar.gz bcm5719-llvm-93253e189c1bc8d058952025d605829adc9473db.zip | |
[X86] Have getVectorMaskingNode return an ISD::AND for X86ISD::VPSHUFBITQMB instead of creating a select with one input being 0.
llvm-svn: 320927
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ffbcd4537ec..60765152403 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -19631,6 +19631,7 @@ static SDValue getVectorMaskingNode(SDValue Op, SDValue Mask, case X86ISD::CMPM: case X86ISD::CMPM_RND: case X86ISD::CMPMU: + case X86ISD::VPSHUFBITQMB: return DAG.getNode(ISD::AND, dl, VT, Op, VMask); case X86ISD::VFPCLASS: return DAG.getNode(ISD::OR, dl, VT, Op, VMask); |
