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authorAndrew V. Tischenko <andrew.v.tischenko@gmail.com>2017-09-20 08:17:17 +0000
committerAndrew V. Tischenko <andrew.v.tischenko@gmail.com>2017-09-20 08:17:17 +0000
commit92980ce6aacc04495f26c6b2cb51652ac68ae43b (patch)
tree7cd408da753b3ae8009d048019b71d47e7c330b7
parent169dbde262054a106f4704097db23d7963368027 (diff)
downloadbcm5719-llvm-92980ce6aacc04495f26c6b2cb51652ac68ae43b.tar.gz
bcm5719-llvm-92980ce6aacc04495f26c6b2cb51652ac68ae43b.zip
'into' instruction should not be decoded as a valid instr in 64-bit mode
llvm-svn: 313735
-rw-r--r--llvm/lib/Target/X86/X86InstrSystem.td2
-rw-r--r--llvm/test/MC/Disassembler/X86/x86-64-err.txt6
2 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 2e5350ce979..e9b6c6785bc 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -33,7 +33,7 @@ def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
// Interrupt and SysCall Instructions.
let Uses = [EFLAGS] in
- def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
+ def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>, Requires<[Not64BitMode]>;
def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
[(int_x86_int (i8 3))], IIC_INT3>;
} // SchedRW
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-err.txt b/llvm/test/MC/Disassembler/X86/x86-64-err.txt
new file mode 100644
index 00000000000..8dd43ed485c
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/x86-64-err.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 2>&1 | FileCheck --check-prefix=64 %s
+# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck --check-prefix=32 %s
+
+# 64: warning: invalid instruction encoding
+# 32: into
+0xce
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