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authorBob Wilson <bob.wilson@apple.com>2011-10-18 17:34:51 +0000
committerBob Wilson <bob.wilson@apple.com>2011-10-18 17:34:51 +0000
commit9258b76d8d751984ab005059db230265320aa93d (patch)
treef4c1887a4f842d3a18a8420372794955028f37ac
parent681561901dbb9804c9eded96363971a49da6a747 (diff)
downloadbcm5719-llvm-9258b76d8d751984ab005059db230265320aa93d.tar.gz
bcm5719-llvm-9258b76d8d751984ab005059db230265320aa93d.zip
Fix incorrect check for sign-extended constant BUILD_VECTOR.
<rdar://problem/10298332> llvm-svn: 142371
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
-rw-r--r--llvm/test/CodeGen/ARM/vmul.ll11
2 files changed, 12 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 1615f5b140d..77530067748 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -4527,7 +4527,7 @@ static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG,
unsigned HalfSize = EltSize / 2;
if (isSigned) {
int64_t SExtVal = C->getSExtValue();
- if ((SExtVal >> HalfSize) != (SExtVal >> EltSize))
+ if (SExtVal != SExtVal << (64 - HalfSize) >> (64 - HalfSize))
return false;
} else {
if ((C->getZExtValue() >> HalfSize) != 0)
diff --git a/llvm/test/CodeGen/ARM/vmul.ll b/llvm/test/CodeGen/ARM/vmul.ll
index 1780d6e66be..61d89bbae83 100644
--- a/llvm/test/CodeGen/ARM/vmul.ll
+++ b/llvm/test/CodeGen/ARM/vmul.ll
@@ -514,3 +514,14 @@ entry:
store <8 x i8> %10, <8 x i8>* %11, align 8
ret void
}
+
+; If one operand has a zero-extend and the other a sign-extend, vmull
+; cannot be used.
+define i16 @vmullWithInconsistentExtensions(<8 x i8> %vec) {
+; CHECK: vmullWithInconsistentExtensions
+; CHECK-NOT: vmull.s8
+ %1 = sext <8 x i8> %vec to <8 x i16>
+ %2 = mul <8 x i16> %1, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
+ %3 = extractelement <8 x i16> %2, i32 0
+ ret i16 %3
+}
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