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author | Craig Topper <craig.topper@intel.com> | 2019-04-02 20:52:16 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-04-02 20:52:16 +0000 |
commit | 9224c114a98c6c5107a1d57240cf3dca483628fc (patch) | |
tree | c32e8a9e478cb65c7b8786e6b1b7a41daac29ce1 | |
parent | ffd8662558b8db500117c92d16f6f82edbc894a7 (diff) | |
download | bcm5719-llvm-9224c114a98c6c5107a1d57240cf3dca483628fc.tar.gz bcm5719-llvm-9224c114a98c6c5107a1d57240cf3dca483628fc.zip |
[X86] Mark the default case of the X86InstrInfo::convertToThreeAddress switch as unreachable.
This function should only be called with instructions that are really convertible. And all
convertible instructions need to be handled by the switch. So nothing should use the default.
llvm-svn: 357529
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index e157bc13ec2..4aa365cf8fe 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -869,7 +869,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, bool Is8BitOp = false; unsigned MIOpc = MI.getOpcode(); switch (MIOpc) { - default: return nullptr; + default: llvm_unreachable("Unreachable!"); case X86::SHL64ri: { assert(MI.getNumOperands() >= 3 && "Unknown shift instruction!"); unsigned ShAmt = getTruncatedShiftCount(MI, 2); |