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authorBill Wendling <isanbard@gmail.com>2010-08-11 00:22:27 +0000
committerBill Wendling <isanbard@gmail.com>2010-08-11 00:22:27 +0000
commit920f74aaabe89d70a18e3daabc58117e501197ac (patch)
tree3fb6d4d5c427fc0d3ecfeefd31e7241c85eab71d
parentcebe0ca75e246f2d69be5a97d48547359e5eca52 (diff)
downloadbcm5719-llvm-920f74aaabe89d70a18e3daabc58117e501197ac.tar.gz
bcm5719-llvm-920f74aaabe89d70a18e3daabc58117e501197ac.zip
Mark ARM compare instructions as isCompare.
llvm-svn: 110761
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index d7860dd24ae..fa8bcb9db95 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -496,7 +496,7 @@ multiclass AI1_bin_s_irs<bits<4> opcod, string opc, PatFrag opnode,
/// AI1_cmp_irs - Defines a set of (op r, {so_imm|r|so_reg}) cmp / test
/// patterns. Similar to AsI1_bin_irs except the instruction does not produce
/// a explicit result, only implicitly set CPSR.
-let Defs = [CPSR] in {
+let isCompare = 1, Defs = [CPSR] in {
multiclass AI1_cmp_irs<bits<4> opcod, string opc, PatFrag opnode,
bit Commutable = 0> {
def ri : AI1<opcod, (outs), (ins GPR:$a, so_imm:$b), DPFrm, IIC_iCMPi,
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