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authorJames Molloy <james.molloy@arm.com>2016-08-01 08:09:55 +0000
committerJames Molloy <james.molloy@arm.com>2016-08-01 08:09:55 +0000
commit91821bd0b402f61b744859034a2da62acf9b91c8 (patch)
tree1aeacddaf6e7fb98f3ec8f964859377d99db9050
parent522c0ec295ad579d653d46040cea7019a5900982 (diff)
downloadbcm5719-llvm-91821bd0b402f61b744859034a2da62acf9b91c8.tar.gz
bcm5719-llvm-91821bd0b402f61b744859034a2da62acf9b91c8.zip
[SimplifyCFG] Try and pacify buildbots after r277325
It looks like the two independent parts of the rotate operation (a lshr and shl) are being reordered on some bots. Add CHECK-DAGs to account for this. llvm-svn: 277329
-rw-r--r--llvm/test/Transforms/SimplifyCFG/rangereduce.ll16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/Transforms/SimplifyCFG/rangereduce.ll b/llvm/test/Transforms/SimplifyCFG/rangereduce.ll
index eee67b430b2..d1a745ecfd9 100644
--- a/llvm/test/Transforms/SimplifyCFG/rangereduce.ll
+++ b/llvm/test/Transforms/SimplifyCFG/rangereduce.ll
@@ -4,8 +4,8 @@ target datalayout = "e-n32"
; CHECK-LABEL: @test1
; CHECK: %1 = sub i32 %a, 97
-; CHECK: %2 = lshr i32 %1, 2
-; CHECK: %3 = shl i32 %1, 30
+; CHECK-DAG: %2 = lshr i32 %1, 2
+; CHECK-DAG: %3 = shl i32 %1, 30
; CHECK: %4 = or i32 %2, %3
; CHECK: switch i32 %4, label %def [
; CHECK: i32 0, label %one
@@ -121,8 +121,8 @@ three:
; CHECK-LABEL: @test6
; CHECK: %1 = sub i32 %a, -109
-; CHECK: %2 = lshr i32 %1, 2
-; CHECK: %3 = shl i32 %1, 30
+; CHECK-DAG: %2 = lshr i32 %1, 2
+; CHECK-DAG: %3 = shl i32 %1, 30
; CHECK: %4 = or i32 %2, %3
; CHECK: switch i32 %4, label %def [
define i32 @test6(i32 %a) optsize {
@@ -146,8 +146,8 @@ three:
; CHECK-LABEL: @test7
; CHECK: %1 = sub i8 %a, -36
-; CHECK: %2 = lshr i8 %1, 2
-; CHECK: %3 = shl i8 %1, 6
+; CHECK-DAG: %2 = lshr i8 %1, 2
+; CHECK-DAG: %3 = shl i8 %1, 6
; CHECK: %4 = or i8 %2, %3
; CHECK: switch.tableidx = {{.*}} %4
define i8 @test7(i8 %a) optsize {
@@ -171,8 +171,8 @@ three:
; CHECK-LABEL: @test8
; CHECK: %1 = sub i32 %a, 97
-; CHECK: %2 = lshr i32 %1, 2
-; CHECK: %3 = shl i32 %1, 30
+; CHECK-DAG: %2 = lshr i32 %1, 2
+; CHECK-DAG: %3 = shl i32 %1, 30
; CHECK: %4 = or i32 %2, %3
; CHECK: switch i32 %4, label %def [
define i32 @test8(i32 %a) optsize {
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