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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-01-28 16:11:35 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-01-28 16:11:35 +0000 |
| commit | 90e08320c9f83dc5554fd287ae4943fdb29b1494 (patch) | |
| tree | 3eddc43d2a9ce3e1ac5fb4ef5213a97baeba3723 | |
| parent | 40ce8af4a5750cb7b35c3bf588b87820a6bb8ce7 (diff) | |
| download | bcm5719-llvm-90e08320c9f83dc5554fd287ae4943fdb29b1494.tar.gz bcm5719-llvm-90e08320c9f83dc5554fd287ae4943fdb29b1494.zip | |
[x32] Change the condition from bitness to LP64 for TCRETURNdi64.
TCRETURNmi64, which was mistakenly changed in r227307 will wait for another day.
llvm-svn: 227317
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrCompiler.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td index 06f795b33c3..be0e4b790a2 100644 --- a/llvm/lib/Target/X86/X86InstrCompiler.td +++ b/llvm/lib/Target/X86/X86InstrCompiler.td @@ -1076,7 +1076,7 @@ def : Pat<(X86tcret ptr_rc_tailcall:$dst, imm:$off), // There wouldn't be enough scratch registers for base+index. def : Pat<(X86tcret_6regs (load addr:$dst), imm:$off), (TCRETURNmi64 addr:$dst, imm:$off)>, - Requires<[IsLP64]>; + Requires<[In64BitMode]>; def : Pat<(X86tcret (i64 tglobaladdr:$dst), imm:$off), (TCRETURNdi64 tglobaladdr:$dst, imm:$off)>, @@ -1084,7 +1084,7 @@ def : Pat<(X86tcret (i64 tglobaladdr:$dst), imm:$off), def : Pat<(X86tcret (i64 texternalsym:$dst), imm:$off), (TCRETURNdi64 texternalsym:$dst, imm:$off)>, - Requires<[In64BitMode]>; + Requires<[IsLP64]>; // Normal calls, with various flavors of addresses. def : Pat<(X86call (i32 tglobaladdr:$dst)), |
