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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-20 22:14:17 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-20 22:14:17 +0000 |
| commit | 90d79bdcd26f27dac9c6da07d6dfcbcb505aea27 (patch) | |
| tree | 84cce40dde98ecf7b98bc6478ff7afe2b90c5a1b | |
| parent | f95a869647769e401c56facf75ca75973a30cad8 (diff) | |
| download | bcm5719-llvm-90d79bdcd26f27dac9c6da07d6dfcbcb505aea27.tar.gz bcm5719-llvm-90d79bdcd26f27dac9c6da07d6dfcbcb505aea27.zip | |
Permit remat when a virtual register has multiple defs.
TII::isTriviallyReMaterializable() shouldn't depend on any properties of the
register being defined by the instruction. Rematerialization is going to create
a new virtual register anyway.
llvm-svn: 129882
| -rw-r--r-- | llvm/lib/CodeGen/TargetInstrInfoImpl.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp index 15340a3f108..b9fcd3804d7 100644 --- a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp +++ b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp @@ -388,11 +388,6 @@ isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, if (MO.isDef() != (i == 0)) return false; - // For the def, it should be the only def of that register. - if (MO.isDef() && (llvm::next(MRI.def_begin(Reg)) != MRI.def_end() || - MRI.isLiveIn(Reg))) - return false; - // Don't allow any virtual-register uses. Rematting an instruction with // virtual register uses would length the live ranges of the uses, which // is not necessarily a good idea, certainly not "trivial". |
