[X86] Add MOVQI2PQIrm, MOVSDmr, and MOVSDrm to scheduler information

The VEX versions were present but not the legacy SSE versions.

llvm-svn: 320294

7 files changed, 24 insertions, 9 deletions

diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index 0f0b4a47778..f6453a21392 100755
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -1014,6 +1014,7 @@ def: InstRW<[BWWriteResGroup10], (instregex "MOVNTPSmr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVPDI2DImr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVPQI2QImr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVPQIto64mr")>;
+def: InstRW<[BWWriteResGroup10], (instregex "MOVSDmr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVSSmr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVUPDmr")>;
 def: InstRW<[BWWriteResGroup10], (instregex "MOVUPSmr")>;
@@ -1849,6 +1850,8 @@ def: InstRW<[BWWriteResGroup49], (instregex "MOVDI2PDIrm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVDQArm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVDQUrm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVNTDQArm")>;
+def: InstRW<[BWWriteResGroup49], (instregex "MOVQI2PQIrm")>;
+def: InstRW<[BWWriteResGroup49], (instregex "MOVSDrm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVSHDUPrm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVSLDUPrm")>;
 def: InstRW<[BWWriteResGroup49], (instregex "MOVSSrm")>;
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 4cc55443394..24dd081d1eb 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -791,6 +791,8 @@ def: InstRW<[HWWriteResGroup0_2], (instregex "MOV64toPQIrm")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOV8rm")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOVDDUPrm")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOVDI2PDIrm")>;
+def: InstRW<[HWWriteResGroup0_2], (instregex "MOVQI2PQIrm")>;
+def: InstRW<[HWWriteResGroup0_2], (instregex "MOVSDrm")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOVSSrm")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOVSX(16|32|64)rm16")>;
 def: InstRW<[HWWriteResGroup0_2], (instregex "MOVSX(16|32|64)rm32")>;
@@ -837,6 +839,7 @@ def: InstRW<[HWWriteResGroup1], (instregex "MOVNTPSmr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVPDI2DImr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVPQI2QImr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVPQIto64mr")>;
+def: InstRW<[HWWriteResGroup1], (instregex "MOVSDmr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVSSmr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVUPDmr")>;
 def: InstRW<[HWWriteResGroup1], (instregex "MOVUPSmr")>;
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index 5e1cfbd7b67..fb133e90f72 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -1312,6 +1312,7 @@ def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPSmr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVPDI2DImr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQI2QImr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVPQIto64mr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVSDmr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVSSmr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPDmr")>;
 def: InstRW<[SBWriteResGroup33], (instregex "MOVUPSmr")>;
@@ -1521,6 +1522,8 @@ def: InstRW<[SBWriteResGroup48], (instregex "MOVDI2PDIrm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVDQArm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVDQUrm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVNTDQArm")>;
+def: InstRW<[SBWriteResGroup48], (instregex "MOVQI2PQIrm")>;
+def: InstRW<[SBWriteResGroup48], (instregex "MOVSDrm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVSHDUPrm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVSLDUPrm")>;
 def: InstRW<[SBWriteResGroup48], (instregex "MOVSSrm")>;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index 1c00296f0ae..3e8b99680d6 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -1015,6 +1015,7 @@ def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTPSmr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVPDI2DImr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVPQI2QImr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVPQIto64mr")>;
+def: InstRW<[SKLWriteResGroup11], (instregex "MOVSDmr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVSSmr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVUPDmr")>;
 def: InstRW<[SKLWriteResGroup11], (instregex "MOVUPSmr")>;
@@ -1880,6 +1881,8 @@ def: InstRW<[SKLWriteResGroup58], (instregex "MOV64toPQIrm")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOV8rm")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOVDDUPrm")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOVDI2PDIrm")>;
+def: InstRW<[SKLWriteResGroup58], (instregex "MOVQI2PQIrm")>;
+def: InstRW<[SKLWriteResGroup58], (instregex "MOVSDrm")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOVSSrm")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16|32|64)rm16")>;
 def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16|32|64)rm32")>;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 94ec2d885f1..616f3b483a2 100755
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -1448,6 +1448,7 @@ def: InstRW<[SKXWriteResGroup11], (instregex "MOVNTPSmr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVPDI2DImr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVPQI2QImr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVPQIto64mr")>;
+def: InstRW<[SKXWriteResGroup11], (instregex "MOVSDmr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVSSmr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVUPDmr")>;
 def: InstRW<[SKXWriteResGroup11], (instregex "MOVUPSmr")>;
@@ -3051,6 +3052,8 @@ def: InstRW<[SKXWriteResGroup58], (instregex "MOV64toPQIrm")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOV8rm")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOVDDUPrm")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOVDI2PDIrm")>;
+def: InstRW<[SKXWriteResGroup58], (instregex "MOVQI2PQIrm")>;
+def: InstRW<[SKXWriteResGroup58], (instregex "MOVSDrm")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOVSSrm")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOVSX(16|32|64)rm16")>;
 def: InstRW<[SKXWriteResGroup58], (instregex "MOVSX(16|32|64)rm32")>;
diff --git a/llvm/test/CodeGen/X86/memcpy-2.ll b/llvm/test/CodeGen/X86/memcpy-2.ll
index bd8f6e91fa3..040dd153d64 100644
--- a/llvm/test/CodeGen/X86/memcpy-2.ll
+++ b/llvm/test/CodeGen/X86/memcpy-2.ll
@@ -12,17 +12,17 @@
 define void @t1(i32 %argc, i8** %argv) nounwind  {
 entry:
 ; SSE2-Darwin-LABEL: t1:
-; SSE2-Darwin: movaps _.str, %xmm0
-; SSE2-Darwin: movaps %xmm0
 ; SSE2-Darwin: movsd _.str+16, %xmm0
 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
+; SSE2-Darwin: movaps _.str, %xmm0
+; SSE2-Darwin: movaps %xmm0
 ; SSE2-Darwin: movb $0, 24(%esp)
 
 ; SSE2-Mingw32-LABEL: t1:
-; SSE2-Mingw32: movaps _.str, %xmm0
-; SSE2-Mingw32: movups %xmm0
 ; SSE2-Mingw32: movsd _.str+16, %xmm0
 ; SSE2-Mingw32: movsd %xmm0, 16(%esp)
+; SSE2-Mingw32: movaps _.str, %xmm0
+; SSE2-Mingw32: movups %xmm0
 ; SSE2-Mingw32: movb $0, 24(%esp)
 
 ; SSE1-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/sse2-schedule.ll b/llvm/test/CodeGen/X86/sse2-schedule.ll
index 41a903b3d5b..092445ec49f 100644
--- a/llvm/test/CodeGen/X86/sse2-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse2-schedule.ll
@@ -1305,7 +1305,7 @@ define float @test_cvtsd2ss(double %a0, double *%a1) {
 ; GENERIC-LABEL: test_cvtsd2ss:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    cvtsd2ss %xmm0, %xmm1 # sched: [4:1.00]
-; GENERIC-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero sched: [4:0.50]
+; GENERIC-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero sched: [6:0.50]
 ; GENERIC-NEXT:    cvtsd2ss %xmm0, %xmm0 # sched: [4:1.00]
 ; GENERIC-NEXT:    addss %xmm1, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
@@ -2869,7 +2869,7 @@ define i64 @test_movd_64(<2 x i64> %a0, i64 %a1, i64 *%a2) {
 ; GENERIC-LABEL: test_movd_64:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    movq %rdi, %xmm1 # sched: [1:1.00]
-; GENERIC-NEXT:    movq {{.*#+}} xmm2 = mem[0],zero sched: [4:0.50]
+; GENERIC-NEXT:    movq {{.*#+}} xmm2 = mem[0],zero sched: [6:0.50]
 ; GENERIC-NEXT:    paddq %xmm0, %xmm1 # sched: [1:0.50]
 ; GENERIC-NEXT:    paddq %xmm0, %xmm2 # sched: [1:0.50]
 ; GENERIC-NEXT:    movq %xmm2, %rax # sched: [2:1.00]
@@ -3326,7 +3326,7 @@ define void @test_movntpd(<2 x double> %a0, <2 x double> *%a1) {
 define <2 x i64> @test_movq_mem(<2 x i64> %a0, i64 *%a1) {
 ; GENERIC-LABEL: test_movq_mem:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero sched: [4:0.50]
+; GENERIC-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero sched: [6:0.50]
 ; GENERIC-NEXT:    paddq %xmm1, %xmm0 # sched: [1:0.50]
 ; GENERIC-NEXT:    movq %xmm0, (%rdi) # sched: [5:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
@@ -3471,9 +3471,9 @@ define <2 x i64> @test_movq_reg(<2 x i64> %a0, <2 x i64> %a1) {
 define void @test_movsd_mem(double* %a0, double* %a1) {
 ; GENERIC-LABEL: test_movsd_mem:
 ; GENERIC:       # %bb.0:
-; GENERIC-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero sched: [4:0.50]
+; GENERIC-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero sched: [6:0.50]
 ; GENERIC-NEXT:    addsd %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT:    movsd %xmm0, (%rsi) # sched: [1:1.00]
+; GENERIC-NEXT:    movsd %xmm0, (%rsi) # sched: [5:1.00]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; ATOM-LABEL: test_movsd_mem: