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| author | Nirav Dave <niravd@google.com> | 2016-09-22 17:28:43 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2016-09-22 17:28:43 +0000 |
| commit | 9011da3d4439ae1fda8283e8f76060b1d38ee61b (patch) | |
| tree | 3bc0c636cfe069fcdb13be9ba873e1c1f220b8ca | |
| parent | 1998ee53f03bd70e811760a6aeb583ee4f4b033a (diff) | |
| download | bcm5719-llvm-9011da3d4439ae1fda8283e8f76060b1d38ee61b.tar.gz bcm5719-llvm-9011da3d4439ae1fda8283e8f76060b1d38ee61b.zip | |
[DAG] Fix incorrect alignment of ext load.
Correctly use alignment size from loaded size not output value size.
Reviewers: jyknight, tstellarAMD, arsenm
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23356
llvm-svn: 282177
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/extload-align.ll | 23 |
2 files changed, 24 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 78334fb36d8..c3d5bee091e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5057,7 +5057,7 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, assert(Chain.getValueType() == MVT::Other && "Invalid chain type"); if (Alignment == 0) // Ensure that codegen never sees alignment 0 - Alignment = getEVTAlignment(VT); + Alignment = getEVTAlignment(MemVT); MMOFlags |= MachineMemOperand::MOLoad; assert((MMOFlags & MachineMemOperand::MOStore) == 0); diff --git a/llvm/test/CodeGen/AMDGPU/extload-align.ll b/llvm/test/CodeGen/AMDGPU/extload-align.ll new file mode 100644 index 00000000000..9d2eb74c7ba --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/extload-align.ll @@ -0,0 +1,23 @@ +; RUN: llc -debug-only=misched -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s +; REQUIRES: asserts + +; Verify that the extload generated from %eval has the default +; alignment size (2) corresponding to the underlying memory size (i16) +; size and not 4 corresponding to the sign-extended size (i32). + +; DEBUG: {{^}}# Machine code for function extload_align: +; DEBUG: mem:LD2[<unknown>]{{[^(]}} +; DEBUG: {{^}}# End machine code for function extload_align. + +define void @extload_align(i32* %out, i32 %index) #0 { + %v0 = alloca [4 x i16] + %a1 = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 0 + %a2 = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 1 + store i16 0, i16* %a1 + store i16 1, i16* %a2 + %a = getelementptr inbounds [4 x i16], [4 x i16]* %v0, i32 0, i32 %index + %val = load i16, i16* %a + %eval = sext i16 %val to i32 + store i32 %eval, i32* %out + ret void +}
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