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author | Dan Gohman <gohman@apple.com> | 2008-09-08 16:31:35 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-09-08 16:31:35 +0000 |
commit | 8f658bac2f15934e347e83449216279b16ccdf3a (patch) | |
tree | 3a6c11f9f2c38def234580aab5372e4f260266f7 | |
parent | e19bc1844f0ef7baabc565a58748edcae9ee719d (diff) | |
download | bcm5719-llvm-8f658bac2f15934e347e83449216279b16ccdf3a.tar.gz bcm5719-llvm-8f658bac2f15934e347e83449216279b16ccdf3a.zip |
Fix copy+pastos in comments.
llvm-svn: 55918
-rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index b2e2532e569..0e3ce1f28c3 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -215,7 +215,7 @@ bool X86FastISel::X86FastEmitLoad(MVT VT, unsigned Ptr, Value *GV, bool X86FastISel::X86FastEmitStore(MVT VT, unsigned Val, unsigned Ptr, unsigned Offset, Value *V) { - // Get opcode and regclass of the output for the given load instruction. + // Get opcode and regclass of the output for the given store instruction. unsigned Opc = 0; const TargetRegisterClass *RC = NULL; switch (VT.getSimpleVT()) { @@ -324,7 +324,7 @@ bool X86FastISel::X86SelectStore(Instruction* I) { Value *V = I->getOperand(1); unsigned Ptr = getRegForValue(V); if (Ptr == 0) { - // Handle constant load address. + // Handle constant store address. if (!isa<Constant>(V) || !X86SelectConstAddr(V, Ptr)) // Unhandled operand. Halt "fast" selection and bail. return false; |