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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-12-15 17:11:17 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-12-15 17:11:17 +0000 |
| commit | 8f307217c3887087f22f3bef30bbdeeb00ee5299 (patch) | |
| tree | 3fd505d60766cdbef7f4480a93d68c197f4a9b3c | |
| parent | 08d5905bac168324ed5bebf80ee253dd5ec3fca6 (diff) | |
| download | bcm5719-llvm-8f307217c3887087f22f3bef30bbdeeb00ee5299.tar.gz bcm5719-llvm-8f307217c3887087f22f3bef30bbdeeb00ee5299.zip | |
AMDGPU/SI: Fix bitcast between v2f32 and f64
The radeonsi fp64 support can hit these now that some redundant bitcasts
are folded.
Patch by: Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 255657
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 08149d4eab2..8163419cd48 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -2561,7 +2561,9 @@ def : BitConvert <v2i32, i64, VReg_64>; def : BitConvert <i64, v2i32, VReg_64>; def : BitConvert <v2f32, i64, VReg_64>; def : BitConvert <i64, v2f32, VReg_64>; +def : BitConvert <v2f32, f64, VReg_64>; def : BitConvert <v2i32, f64, VReg_64>; +def : BitConvert <f64, v2f32, VReg_64>; def : BitConvert <f64, v2i32, VReg_64>; def : BitConvert <v4f32, v4i32, VReg_128>; def : BitConvert <v4i32, v4f32, VReg_128>; @@ -2570,7 +2572,9 @@ def : BitConvert <v4i32, v4f32, VReg_128>; def : BitConvert <v2i64, v4i32, SReg_128>; def : BitConvert <v4i32, v2i64, SReg_128>; +def : BitConvert <v2f64, v4f32, VReg_128>; def : BitConvert <v2f64, v4i32, VReg_128>; +def : BitConvert <v4f32, v2f64, VReg_128>; def : BitConvert <v4i32, v2f64, VReg_128>; |
