summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanaka@mips.com>2013-11-11 21:49:03 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-11-11 21:49:03 +0000
commit8f1caeb0e187250cf96bdee3013c7a6f16ac2c6f (patch)
tree975b1aca9b7244106d2bc36dd97f7d16df2e2ffc
parentda0b753035f28f78dc6a30b5c554b07ca50c9506 (diff)
downloadbcm5719-llvm-8f1caeb0e187250cf96bdee3013c7a6f16ac2c6f.tar.gz
bcm5719-llvm-8f1caeb0e187250cf96bdee3013c7a6f16ac2c6f.zip
[mips] Partially revert r193641. Stack alignment should not be determined by
the floating point register mode. llvm-svn: 194423
-rw-r--r--llvm/lib/Target/Mips/MipsSubtarget.h2
-rw-r--r--llvm/test/CodeGen/Mips/stack-alignment.ll3
2 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h
index 7c175537a72..6b2ab1238b8 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.h
+++ b/llvm/lib/Target/Mips/MipsSubtarget.h
@@ -217,7 +217,7 @@ public:
//
static bool useConstantIslands();
- unsigned stackAlignment() const { return isFP64bit() ? 16 : 8; }
+ unsigned stackAlignment() const { return hasMips64() ? 16 : 8; }
// Grab MipsRegInfo object
const MipsReginfo &getMReginfo() const { return MRI; }
diff --git a/llvm/test/CodeGen/Mips/stack-alignment.ll b/llvm/test/CodeGen/Mips/stack-alignment.ll
index 403a10625f4..b18f96695ff 100644
--- a/llvm/test/CodeGen/Mips/stack-alignment.ll
+++ b/llvm/test/CodeGen/Mips/stack-alignment.ll
@@ -1,9 +1,8 @@
; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
-; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck %s -check-prefix=32-FP64
+; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck %s -check-prefix=32
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
; 32: addiu $sp, $sp, -8
-; 32-FP64: addiu $sp, $sp, -16
; 64: addiu $sp, $sp, -16
define i32 @foo1() #0 {
OpenPOWER on IntegriCloud