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| author | Tim Northover <tnorthover@apple.com> | 2017-12-10 08:42:34 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2017-12-10 08:42:34 +0000 |
| commit | 8f1bc370e2a8d9a55c4c0b9c958a5a21c59e8180 (patch) | |
| tree | b74c952fd74b69fc992be3c4db6480b795935745 | |
| parent | fa3f1a15b210ac57133e37c0b607dcf3731e55bf (diff) | |
| download | bcm5719-llvm-8f1bc370e2a8d9a55c4c0b9c958a5a21c59e8180.tar.gz bcm5719-llvm-8f1bc370e2a8d9a55c4c0b9c958a5a21c59e8180.zip | |
PPC32: Support R_PPC_PLTREL32 in static mode.
See https://reviews.llvm.org/D39226
Patch by vit9696 <vit9696@avp.su>
llvm-svn: 320286
| -rw-r--r-- | lld/ELF/Arch/PPC.cpp | 10 | ||||
| -rw-r--r-- | lld/test/ELF/ppc-relocs.s | 12 |
2 files changed, 22 insertions, 0 deletions
diff --git a/lld/ELF/Arch/PPC.cpp b/lld/ELF/Arch/PPC.cpp index e9a79f89a36..e23bcfcfc7a 100644 --- a/lld/ELF/Arch/PPC.cpp +++ b/lld/ELF/Arch/PPC.cpp @@ -34,6 +34,15 @@ RelExpr PPC::getRelExpr(RelType Type, const Symbol &S, case R_PPC_REL24: case R_PPC_REL32: return R_PC; + // In general case R_PPC_PLTREL24 should result in R_PLT_PC, however, since + // PLT support is currently not available for PPC32 this workaround at least + // allows lld to resolve local symbols when performing static linkage after + // LLVM started to forcibly use PLT relocations by default (see D38554). + // Non-local symbols will need a full PLT implementation, but once it lands + // local symbols should still avoid PLT table with static relocation model. + // This is the optimisation that bfd and gold are doing by default as well. + case R_PPC_PLTREL24: + return R_PC; default: return R_ABS; } @@ -54,6 +63,7 @@ void PPC::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const { case R_PPC_REL32: write32be(Loc, Val); break; + case R_PPC_PLTREL24: case R_PPC_REL24: write32be(Loc, read32be(Loc) | (Val & 0x3FFFFFC)); break; diff --git a/lld/test/ELF/ppc-relocs.s b/lld/test/ELF/ppc-relocs.s index 1160477df27..5aa3474e633 100644 --- a/lld/test/ELF/ppc-relocs.s +++ b/lld/test/ELF/ppc-relocs.s @@ -76,3 +76,15 @@ mystr: # CHECK: Disassembly of section .R_PPC_ADDR32: # CHECK: .FR_PPC_ADDR32: # CHECK: 11024: 00 01 10 28 + +.align 2 +.section .R_PPC_PLTREL24,"ax",@progbits +.globl .R_PPC_PLTREL24 +.FR_PPC_PLTREL24: + b .Lfoox4@PLT +.section .R_PPC_PLTREL24_2,"ax",@progbits +.Lfoox4: + +# CHECK: Disassembly of section .R_PPC_PLTREL24: +# CHECK: .R_PPC_PLTREL24: +# CHECK: 11028: 48 00 00 04 b .+4 |
