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author | Craig Topper <craig.topper@gmail.com> | 2016-07-03 19:37:10 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2016-07-03 19:37:10 +0000 |
commit | 8e826d5abe6131d1de94f8ac0eb42ce66862cd7b (patch) | |
tree | e7c02db558bbc8d966f6d62503d281a0f7f9ce6f | |
parent | b71b2f622a00ab55073214e4e701f902ebeb8dc9 (diff) | |
download | bcm5719-llvm-8e826d5abe6131d1de94f8ac0eb42ce66862cd7b.tar.gz bcm5719-llvm-8e826d5abe6131d1de94f8ac0eb42ce66862cd7b.zip |
[X86] Add tests to show that the DAG combine for OR of shuffles with zero vectors doesn't handle undefs as well as it could. Fix coming in another commit.
llvm-svn: 274471
-rw-r--r-- | llvm/test/CodeGen/X86/combine-or.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-or.ll b/llvm/test/CodeGen/X86/combine-or.ll index 22f0dbbd1a9..fdca611c56c 100644 --- a/llvm/test/CodeGen/X86/combine-or.ll +++ b/llvm/test/CodeGen/X86/combine-or.ll @@ -391,3 +391,31 @@ define <4 x i32> @test2d(<4 x i32> %a, <4 x i32> %b) { %or = or <4 x i32> %shuf1, %shuf2 ret <4 x i32> %or } + +; Make sure we can have an undef where an index pointing to the zero vector should be + +define <4 x i32> @test2e(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: test2e: +; CHECK: # BB#0: +; CHECK-NEXT: pxor %xmm2, %xmm2 +; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5,6,7] +; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero +; CHECK-NEXT: por %xmm1, %xmm0 +; CHECK-NEXT: retq + %shuf1 = shufflevector <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>, <4 x i32><i32 undef, i32 4, i32 2, i32 3> + %shuf2 = shufflevector <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>, <4 x i32><i32 0, i32 1, i32 4, i32 4> + %or = or <4 x i32> %shuf1, %shuf2 + ret <4 x i32> %or +} + +define <4 x i32> @test2f(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: test2f: +; CHECK: # BB#0: +; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] +; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7] +; CHECK-NEXT: retq + %shuf1 = shufflevector <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>, <4 x i32><i32 4, i32 4, i32 2, i32 3> + %shuf2 = shufflevector <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>, <4 x i32><i32 undef, i32 1, i32 4, i32 4> + %or = or <4 x i32> %shuf1, %shuf2 + ret <4 x i32> %or +} |