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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-07-21 15:44:55 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-07-21 15:44:55 +0000 |
| commit | 8e44d948b6ec10bf5e0dc4e8904245b2a6e92c86 (patch) | |
| tree | c67b03a129220b50e11487e103f87a942bf273ab | |
| parent | e22244b7334b443a7d261e9355a928000fe70c19 (diff) | |
| download | bcm5719-llvm-8e44d948b6ec10bf5e0dc4e8904245b2a6e92c86.tar.gz bcm5719-llvm-8e44d948b6ec10bf5e0dc4e8904245b2a6e92c86.zip | |
R600/SI: Remove vaddr operand from BUFFER_LOAD_*_OFFSET instructions
This operand is never used.
llvm-svn: 213549
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index c1f22a5d26d..c94cce7bc8b 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -597,9 +597,9 @@ multiclass MUBUF_Load_Helper <bits<7> op, string asm, RegisterClass regClass, let addr64 = 0 in { - let offen = 0, idxen = 0 in { + let offen = 0, idxen = 0, vaddr = 0 in { def _OFFSET : MUBUF <op, (outs regClass:$vdata), - (ins SReg_128:$srsrc, VReg_32:$vaddr, + (ins SReg_128:$srsrc, u16imm:$offset, SSrc_32:$soffset, i1imm:$glc, i1imm:$slc, i1imm:$tfe), asm#" $vdata, $srsrc + $offset + $soffset, glc=$glc, slc=$slc, tfe=$tfe", []>; diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index c97de9297ab..291b5376849 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -2621,10 +2621,10 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe MUBUF bothen> { def : Pat < - (vt (int_SI_buffer_load_dword v4i32:$rsrc, i32:$vaddr, i32:$soffset, + (vt (int_SI_buffer_load_dword v4i32:$rsrc, (i32 imm), i32:$soffset, imm:$offset, 0, 0, imm:$glc, imm:$slc, imm:$tfe)), - (offset $rsrc, $vaddr, (as_i16imm $offset), $soffset, (as_i1imm $glc), + (offset $rsrc, (as_i16imm $offset), $soffset, (as_i1imm $glc), (as_i1imm $slc), (as_i1imm $tfe)) >; |
