AArch64: Add support for reading pc using llvm.read_register.

This is useful for allowing code to efficiently take an address
that can be later mapped onto debug info. Currently the hwasan
pass achieves this by taking the address of the current function:
http://llvm-cs.pcc.me.uk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp#921

but this costs two instructions (plus a GOT entry in PIC code) per function
with stack variables. This will allow the cost to be reduced to a single
instruction.

Differential Revision: https://reviews.llvm.org/D63471

llvm-svn: 364126

2 files changed, 19 insertions, 0 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 3b27b9f5b02..2a911c43908 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -2678,6 +2678,14 @@ bool AArch64DAGToDAGISel::tryReadRegister(SDNode *N) {
     return true;
   }
 
+  if (RegString->getString() == "pc") {
+    ReplaceNode(N, CurDAG->getMachineNode(
+                       AArch64::ADR, DL, N->getSimpleValueType(0), MVT::Other,
+                       CurDAG->getTargetConstant(0, DL, MVT::i32),
+                       N->getOperand(0)));
+    return true;
+  }
+
   return false;
 }
 
diff --git a/llvm/test/CodeGen/AArch64/read-pc.ll b/llvm/test/CodeGen/AArch64/read-pc.ll
new file mode 100644
index 00000000000..626eaacefb6
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/read-pc.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s
+
+define i64 @read_pc() {
+  ; CHECK: adr x0, #0
+  %pc = call i64 @llvm.read_register.i64(metadata !0)
+  ret i64 %pc
+}
+
+declare i64 @llvm.read_register.i64(metadata) nounwind
+
+!0 = !{!"pc"}