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| author | Craig Topper <craig.topper@intel.com> | 2018-12-17 21:50:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-12-17 21:50:06 +0000 |
| commit | 8c9d7729916c143fac07ea69acfff3cb13458278 (patch) | |
| tree | 6e359b4cf2629c0c92f4e369ec819e11b125f37e | |
| parent | 94ee0728e5e8665821ecfc20c2441e4bfc4e0bf2 (diff) | |
| download | bcm5719-llvm-8c9d7729916c143fac07ea69acfff3cb13458278.tar.gz bcm5719-llvm-8c9d7729916c143fac07ea69acfff3cb13458278.zip | |
[X86] Add T1MSKC and TZMSK to isDefConvertible used by optimizeCompareInstr.
These seem to have been missed when the other TBM instructions were added.
llvm-svn: 349404
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/tbm_patterns.ll | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index a0cd1a09d6f..0d356b68ec5 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3554,6 +3554,10 @@ inline static bool isDefConvertible(MachineInstr &MI) { case X86::BLSFILL64rr: case X86::BLSFILL64rm: case X86::BLSIC32rr: case X86::BLSIC32rm: case X86::BLSIC64rr: case X86::BLSIC64rm: + case X86::T1MSKC32rr: case X86::T1MSKC32rm: + case X86::T1MSKC64rr: case X86::T1MSKC64rm: + case X86::TZMSK32rr: case X86::TZMSK32rm: + case X86::TZMSK64rr: case X86::TZMSK64rm: return true; } } diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll index 2b335ea4268..7ebc5dd0d12 100644 --- a/llvm/test/CodeGen/X86/tbm_patterns.ll +++ b/llvm/test/CodeGen/X86/tbm_patterns.ll @@ -723,7 +723,6 @@ define i32 @test_x86_tbm_t1mskc_u32_z(i32 %a, i32 %b) nounwind { ; CHECK-LABEL: test_x86_tbm_t1mskc_u32_z: ; CHECK: # %bb.0: ; CHECK-NEXT: t1mskcl %edi, %eax -; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: cmovel %esi, %eax ; CHECK-NEXT: retq %t0 = xor i32 %a, -1 @@ -767,7 +766,6 @@ define i64 @test_x86_tbm_t1mskc_u64_z(i64 %a, i64 %b) nounwind { ; CHECK-LABEL: test_x86_tbm_t1mskc_u64_z: ; CHECK: # %bb.0: ; CHECK-NEXT: t1mskcq %rdi, %rax -; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: cmoveq %rsi, %rax ; CHECK-NEXT: retq %t0 = xor i64 %a, -1 @@ -811,7 +809,6 @@ define i32 @test_x86_tbm_tzmsk_u32_z(i32 %a, i32 %b) nounwind { ; CHECK-LABEL: test_x86_tbm_tzmsk_u32_z: ; CHECK: # %bb.0: ; CHECK-NEXT: tzmskl %edi, %eax -; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: cmovel %esi, %eax ; CHECK-NEXT: retq %t0 = xor i32 %a, -1 @@ -855,7 +852,6 @@ define i64 @test_x86_tbm_tzmsk_u64_z(i64 %a, i64 %b) nounwind { ; CHECK-LABEL: test_x86_tbm_tzmsk_u64_z: ; CHECK: # %bb.0: ; CHECK-NEXT: tzmskq %rdi, %rax -; CHECK-NEXT: testq %rax, %rax ; CHECK-NEXT: cmoveq %rsi, %rax ; CHECK-NEXT: retq %t0 = xor i64 %a, -1 |
