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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 20:44:43 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 20:44:43 +0000 |
| commit | 8c1c51045d6b7be033546b25d233df832b8b53f0 (patch) | |
| tree | 8d7ae577c7d82b8d339dd7c0706efe781158b984 | |
| parent | 199a0bb5291d6453c4b68c9479bc79867b195ef9 (diff) | |
| download | bcm5719-llvm-8c1c51045d6b7be033546b25d233df832b8b53f0.tar.gz bcm5719-llvm-8c1c51045d6b7be033546b25d233df832b8b53f0.zip | |
Use sltiu instead of sltu when a register operand and immediate are compared.
llvm-svn: 141708
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index 8c8bc76e4b5..495b969ddcc 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -242,7 +242,7 @@ defm : BrcondPats<CPU64Regs, BEQ64, BNE64, SLT64, SLTu64, SLTi64, SLTiu64, // setcc patterns def : Pat<(seteq CPU64Regs:$lhs, CPU64Regs:$rhs), - (SLTu64 (DXOR CPU64Regs:$lhs, CPU64Regs:$rhs), 1)>; + (SLTiu64 (DXOR CPU64Regs:$lhs, CPU64Regs:$rhs), 1)>; def : Pat<(setne CPU64Regs:$lhs, CPU64Regs:$rhs), (SLTu64 ZERO_64, (DXOR CPU64Regs:$lhs, CPU64Regs:$rhs))>; diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 9b07082a422..2c1893044b0 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -954,7 +954,7 @@ defm : MovnPats<CPURegs, MOVN_I>; // setcc patterns def : Pat<(seteq CPURegs:$lhs, CPURegs:$rhs), - (SLTu (XOR CPURegs:$lhs, CPURegs:$rhs), 1)>; + (SLTiu (XOR CPURegs:$lhs, CPURegs:$rhs), 1)>; def : Pat<(setne CPURegs:$lhs, CPURegs:$rhs), (SLTu ZERO, (XOR CPURegs:$lhs, CPURegs:$rhs))>; |
