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authorJoerg Sonnenberger <joerg@bec.de>2016-11-16 00:37:30 +0000
committerJoerg Sonnenberger <joerg@bec.de>2016-11-16 00:37:30 +0000
commit8c1a9ac52b560b1dd63269665965b2baffef0e9b (patch)
tree95155b0c015a29dee6d0ef4e22ae10b6a3e1c03f
parentca185797666f429f95c811f9fd19a02ab21cd465 (diff)
downloadbcm5719-llvm-8c1a9ac52b560b1dd63269665965b2baffef0e9b.tar.gz
bcm5719-llvm-8c1a9ac52b560b1dd63269665965b2baffef0e9b.zip
Always use relative jump table encodings on PowerPC64.
For the default, small and medium code model, use the existing difference from the jump table towards the label. For all other code models, setup the picbase and use the difference between the picbase and the block address. Overall, this results in smaller data tables at the expensive of one or two more arithmetic operation at the jump site. Given that we only create jump tables with a lot more than two entries, it is a net win in size. For larger code models the assumption remains that individual functions are no larger than 2GB. Differential Revision: https://reviews.llvm.org/D26336 llvm-svn: 287059
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp50
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h9
-rw-r--r--llvm/test/CodeGen/PowerPC/mcm-5.ll35
3 files changed, 86 insertions, 8 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 7468b8baba1..eb8e6007ab9 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -27,6 +27,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
@@ -2179,6 +2180,55 @@ SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
return LowerLabelRef(CPIHi, CPILo, IsPIC, DAG);
}
+// For 64-bit PowerPC, prefer the more compact relative encodings.
+// This trades 32 bits per jump table entry for one or two instructions
+// on the jump site.
+unsigned PPCTargetLowering::getJumpTableEncoding() const {
+ if (isJumpTableRelative())
+ return MachineJumpTableInfo::EK_LabelDifference32;
+
+ return TargetLowering::getJumpTableEncoding();
+}
+
+bool PPCTargetLowering::isJumpTableRelative() const {
+ if (Subtarget.isPPC64())
+ return true;
+ return TargetLowering::isJumpTableRelative();
+}
+
+SDValue PPCTargetLowering::getPICJumpTableRelocBase(SDValue Table,
+ SelectionDAG &DAG) const {
+ if (!Subtarget.isPPC64())
+ return TargetLowering::getPICJumpTableRelocBase(Table, DAG);
+
+ switch (getTargetMachine().getCodeModel()) {
+ case CodeModel::Default:
+ case CodeModel::Small:
+ case CodeModel::Medium:
+ return TargetLowering::getPICJumpTableRelocBase(Table, DAG);
+ default:
+ return DAG.getNode(PPCISD::GlobalBaseReg, SDLoc(),
+ getPointerTy(DAG.getDataLayout()));
+ }
+}
+
+const MCExpr *
+PPCTargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
+ unsigned JTI,
+ MCContext &Ctx) const {
+ if (!Subtarget.isPPC64())
+ return TargetLowering::getPICJumpTableRelocBaseExpr(MF, JTI, Ctx);
+
+ switch (getTargetMachine().getCodeModel()) {
+ case CodeModel::Default:
+ case CodeModel::Small:
+ case CodeModel::Medium:
+ return TargetLowering::getPICJumpTableRelocBaseExpr(MF, JTI, Ctx);
+ default:
+ return MCSymbolRefExpr::create(MF->getPICBaseSymbol(), Ctx);
+ }
+}
+
SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
EVT PtrVT = Op.getValueType();
JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 689a2e6bb68..6f9cc2491c5 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -770,6 +770,15 @@ namespace llvm {
void insertSSPDeclarations(Module &M) const override;
bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
+
+ unsigned getJumpTableEncoding() const override;
+ bool isJumpTableRelative() const override;
+ SDValue getPICJumpTableRelocBase(SDValue Table,
+ SelectionDAG &DAG) const override;
+ const MCExpr *getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
+ unsigned JTI,
+ MCContext &Ctx) const override;
+
private:
struct ReuseLoadInfo {
SDValue Ptr;
diff --git a/llvm/test/CodeGen/PowerPC/mcm-5.ll b/llvm/test/CodeGen/PowerPC/mcm-5.ll
index 7bd88b22b22..a4bb2af6dc1 100644
--- a/llvm/test/CodeGen/PowerPC/mcm-5.ll
+++ b/llvm/test/CodeGen/PowerPC/mcm-5.ll
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=medium <%s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=large <%s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
; Test correct code generation for medium and large code model
; for loading the address of a jump table from the TOC.
@@ -50,11 +50,30 @@ sw.epilog: ; preds = %sw.bb3, %sw.default
%5 = load i32, i32* %i.addr, align 4
ret i32 %5
}
-
; CHECK-LABEL: test_jump_table:
-; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
-; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
-; CHECK: ldx {{[0-9]+}}, {{[0-9]+}}, [[REG2]]
-; CHECK: .section .toc
-; CHECK: .LC[[TOCNUM]]:
-; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
+; CHECK-NOT: bl .L0$pb
+
+; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
+; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
+; CHECK: lwax [[REG3:[0-9]+]], {{[0-9]+}}, [[REG2]]
+; CHECK-NEXT: add [[REG4:[0-9]+]], [[REG3]], [[REG2]]
+; CHECK-NEXT: mtctr [[REG4]]
+; CHECK-NEXT: bctr
+
+; CHECK-LABEL: .LJTI0_0:
+; CHECK-NEXT: .long .LBB0_{{[0-9]+}}-.LJTI0_0
+
+; LARGE-LABEL: test_jump_table:
+; LARGE: bl .L0$pb
+; LARGE-NEXT: .L0$pb:
+; LARGE: mflr [[REGBASE:[0-9]+]]
+
+; LARGE: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
+; LARGE: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
+; LARGE: lwax [[REG3:[0-9]+]], {{[0-9]+}}, [[REG2]]
+; LARGE-NEXT: add [[REG4:[0-9]+]], [[REG3]], [[REGBASE]]
+; LARGE-NEXT: mtctr [[REG4]]
+; LARGE-NEXT: bctr
+
+; LARGE-LABEL: .LJTI0_0:
+; LARGE-NEXT: .long .LBB0_{{[0-9]+}}-.L0$pb
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