diff options
| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-07-28 01:26:53 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-07-28 01:26:53 +0000 |
| commit | 8c19a8b5d5b4dd41c3155af035f40b79de3e8ef2 (patch) | |
| tree | 8a0dfa31a198d3d96a183f15bec9350c28024b1f | |
| parent | 76bc28bac6625b4eaf585a0198f44e642251aed9 (diff) | |
| download | bcm5719-llvm-8c19a8b5d5b4dd41c3155af035f40b79de3e8ef2.tar.gz bcm5719-llvm-8c19a8b5d5b4dd41c3155af035f40b79de3e8ef2.zip | |
Invert the subvector insertion to be more likely to be taken as a COPY
llvm-svn: 136324
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e1c64ea04ef..e969553070a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4809,9 +4809,9 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { NumElems/2); // Recreate the wider vector with the lower and upper part. - SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Upper, - DAG.getConstant(NumElems/2, MVT::i32), DAG, dl); - return Insert128BitVector(Vec, Lower, DAG.getConstant(0, MVT::i32), + SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Lower, + DAG.getConstant(0, MVT::i32), DAG, dl); + return Insert128BitVector(Vec, Upper, DAG.getConstant(NumElems/2, MVT::i32), DAG, dl); } |
