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| author | Sanjay Patel <spatel@rotateright.com> | 2016-07-19 17:07:35 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-07-19 17:07:35 +0000 |
| commit | 8b76ebe5b8b7db54158c246114d9cb58d188f280 (patch) | |
| tree | 33e662481eca65c91ad939adf84eb0f84b3d21ef | |
| parent | 5366d0e0bc49c6cedf105ecb9b03eea75df46f4e (diff) | |
| download | bcm5719-llvm-8b76ebe5b8b7db54158c246114d9cb58d188f280.tar.gz bcm5719-llvm-8b76ebe5b8b7db54158c246114d9cb58d188f280.zip | |
add tests related to PR28466
llvm-svn: 275995
| -rw-r--r-- | llvm/test/Transforms/InstSimplify/select.ll | 61 |
1 files changed, 60 insertions, 1 deletions
diff --git a/llvm/test/Transforms/InstSimplify/select.ll b/llvm/test/Transforms/InstSimplify/select.ll index 2f19d841f8c..46e79a258e2 100644 --- a/llvm/test/Transforms/InstSimplify/select.ll +++ b/llvm/test/Transforms/InstSimplify/select.ll @@ -132,7 +132,21 @@ define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) { } ; PR28466: https://llvm.org/bugs/show_bug.cgi?id=28466 -; InstSimplify needs to recognize variations of this pattern. + +define i32 @select_icmp_trunc_8_eq_0_or_8(i32 %x) { +; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_8( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0 +; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[OR]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +; + %trunc = trunc i32 %x to i8 + %cmp = icmp slt i8 %trunc, 0 + %or = or i32 %x, 128 + %sel = select i1 %cmp, i32 %or, i32 %x + ret i32 %sel +} define i32 @select_icmp_and_8_ne_0_or_128(i32 %x) { ; CHECK-LABEL: @select_icmp_and_8_ne_0_or_128( @@ -145,6 +159,21 @@ define i32 @select_icmp_and_8_ne_0_or_128(i32 %x) { ret i32 %or.x } +define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) { +; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i8 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TRUNC]], 0 +; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 128 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[OR]] +; CHECK-NEXT: ret i32 [[SEL]] +; + %trunc = trunc i32 %x to i8 + %cmp = icmp slt i8 %trunc, 0 + %or = or i32 %x, 128 + %sel = select i1 %cmp, i32 %x, i32 %or + ret i32 %sel +} + define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) { ; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8( ; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, -9 @@ -157,6 +186,21 @@ define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) { ret i32 %x.and1 } +define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) { +; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0 +; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 [[AND]] +; CHECK-NEXT: ret i32 [[SEL]] +; + %trunc = trunc i32 %x to i4 + %cmp = icmp slt i4 %trunc, 0 + %and = and i32 %x, -9 + %sel = select i1 %cmp, i32 %x, i32 %and + ret i32 %sel +} + define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) { ; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8( ; CHECK-NEXT: ret i32 %x @@ -168,6 +212,21 @@ define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) { ret i32 %and1.x } +define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) { +; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8( +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 %x to i4 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i4 [[TRUNC]], 0 +; CHECK-NEXT: [[AND:%.*]] = and i32 %x, -9 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[AND]], i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +; + %trunc = trunc i32 %x to i4 + %cmp = icmp slt i4 %trunc, 0 + %and = and i32 %x, -9 + %sel = select i1 %cmp, i32 %and, i32 %x + ret i32 %sel +} + define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) { ; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8( ; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8 |
